[PATCH] D143759: [AMDGPU] Implement whole wave register spill

[Yashwant Singh via Phabricator via llvm-commits]

yassingh updated this revision to Diff 534586.
yassingh added a comment.

Review comments and fix formatting


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143759/new/

https://reviews.llvm.org/D143759

Files:
  llvm/include/llvm/CodeGen/MachineRegisterInfo.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
  llvm/lib/Target/AMDGPU/SIDefines.h
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/lib/Target/AMDGPU/SIFrameLowering.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/test/CodeGen/AMDGPU/bf16.ll
  llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
  llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
  llvm/test/CodeGen/AMDGPU/indirect-call.ll
  llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
  llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
  llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
  llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
  llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
  llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
  llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
  llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
  llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
  llvm/test/CodeGen/MIR/AMDGPU/sgpr-for-exec-copy-invalid-reg.mir

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