[PATCH] D153316: [AArch64][SelectionDAG] fix infinite loop caused by legalizing & combining CONCAT_VECTORS
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 26 02:30:25 PDT 2023
RKSimon added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:23175
+ // scalable. To avoid the infinite loop, we skip combining here when
+ // LegalDAG is true and the combining would produce a scalable vector.
+ if (In.getOpcode() == ISD::CONCAT_VECTORS && In.hasOneUse() &&
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Drop the "To avoid the infinite loop..." sentence - its just repeating what is explained earlier.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153316/new/
https://reviews.llvm.org/D153316
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