[PATCH] D149773: [AMDGPU][IGLP] Add iglp_opt(1) strategy for single wave gemms

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp:115
 
+  // The caches which each rule may use to store relevant SUnits
+  SmallVector<SmallVector<SUnit *, 4>, 4> Caches;
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Looks good, but this seems a bit vague as a field in SchedGroup. Can these just be captured in the lamdas since the way each rule would use a cache may be different?



Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149773/new/

https://reviews.llvm.org/D149773