[llvm] c3b27c2 - RegAllocGreedy: Fix assert with remarks on unassigned subregisters

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 25 16:26:34 PDT 2023


Author: Matt Arsenault
Date: 2023-06-25T19:26:25-04:00
New Revision: c3b27c236d6a495acbe2ba95c43faf9a98e81a46

URL: https://github.com/llvm/llvm-project/commit/c3b27c236d6a495acbe2ba95c43faf9a98e81a46
DIFF: https://github.com/llvm/llvm-project/commit/c3b27c236d6a495acbe2ba95c43faf9a98e81a46.diff

LOG: RegAllocGreedy: Fix assert with remarks on unassigned subregisters

This tried to query the physical subregister on virtual registers
if they were left unassigned.

Added: 
    llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir

Modified: 
    llvm/lib/CodeGen/RegAllocGreedy.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 02223d442757e..48187e575494f 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -2462,12 +2462,12 @@ RAGreedy::RAGreedyStats RAGreedy::computeStats(MachineBasicBlock &MBB) {
       if (SrcReg.isVirtual() || DestReg.isVirtual()) {
         if (SrcReg.isVirtual()) {
           SrcReg = VRM->getPhys(SrcReg);
-          if (Src.getSubReg())
+          if (SrcReg && Src.getSubReg())
             SrcReg = TRI->getSubReg(SrcReg, Src.getSubReg());
         }
         if (DestReg.isVirtual()) {
           DestReg = VRM->getPhys(DestReg);
-          if (Dest.getSubReg())
+          if (DestReg && Dest.getSubReg())
             DestReg = TRI->getSubReg(DestReg, Dest.getSubReg());
         }
         if (SrcReg != DestReg)

diff  --git a/llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir b/llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
new file mode 100644
index 0000000000000..374617c93ce4d
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
@@ -0,0 +1,36 @@
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 \
+# RUN:   -start-before=greedy,0 -stop-after=virtregrewriter,0 -pass-remarks='.*' -pass-remarks-output=%t.yaml -o /dev/null %s
+# RUN: FileCheck %s < %t.yaml
+
+# CHECK: Name:            SpillReloadCopies
+# CHECK-NEXT: Function:        func
+# CHECK-NEXT: Args:
+# CHECK-NEXT: - NumVRCopies:     '3'
+# CHECK-NEXT: - String:          ' virtual registers copies '
+
+# Make sure the remarks do not crash with subregisters on unassigned
+# virtual register copies.
+
+---
+name:            func
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $sgpr1
+
+  ; Unassigned dest with subreg
+  undef %0.sub0:vreg_64 = COPY $vgpr0_vgpr1
+
+  ; unassigned src and dest with subregs
+  undef %1.sub1:vreg_64 = COPY %0.sub0
+
+   %2:vreg_64 = COPY $vgpr2_vgpr3
+
+  ; Unassigned src with subregs
+  $vgpr0 = COPY %2.sub0
+
+  ; Dummy SGPR to allocate to ensure allocation ran.
+  %3:sreg_32 = COPY $sgpr1
+  S_ENDPGM 0, implicit %0, implicit %1, implicit $vgpr0, implicit %3
+
+...


        


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