[PATCH] D153300: [AArch64][GlobalISel] IR translate support for a return instruction of type <1 x i8> or <1 x i16> when using GlobalISel.

[Amara Emerson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG10b1f58cba4f: [AArch64][GlobalISel] IR translate support for a return instruction of type <1… (authored by Niwin Anto <niwin.anto at hightec-rt.com>, committed by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153300/new/

https://reviews.llvm.org/D153300

Files:
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
  llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D153300.534377.patch
Type: text/x-patch
Size: 10367 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230625/80b8b455/attachment.bin>