[llvm] 2c9aba9 - [LSR] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 23 08:07:06 PDT 2023
Author: Nikita Popov
Date: 2023-06-23T17:06:51+02:00
New Revision: 2c9aba935284efe32668504daca93a0334128f53
URL: https://github.com/llvm/llvm-project/commit/2c9aba935284efe32668504daca93a0334128f53
DIFF: https://github.com/llvm/llvm-project/commit/2c9aba935284efe32668504daca93a0334128f53.diff
LOG: [LSR] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll
llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
llvm/test/Transforms/LoopStrengthReduce/shl.ll
llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll b/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
index c1975b7d8434c..36088657e6006 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 -loop-reduce -S < %s | FileCheck %s
;
; Test LSR's intelligence regarding phi reuse.
@@ -9,24 +10,42 @@ target triple = "x86_64-apple-darwin"
target datalayout = "n8:16:32:64"
-; CHECK-LABEL: @test(
-; multiplies are hoisted out of the loop
-; CHECK: while.body.lr.ph:
-; CHECK: shl nsw i64
-; CHECK: shl nsw i64
-; GEPs are ugly
-; CHECK: while.body:
-; CHECK: phi
-; CHECK: phi
-; CHECK: phi
-; CHECK: phi
-; CHECK-NOT: phi
-; CHECK: bitcast float* {{.*}} to i1*
-; CHECK: bitcast float* {{.*}} to i1*
-; CHECK: getelementptr i1, i1*
-; CHECK: getelementptr i1, i1*
-
define float @test(float* nocapture %A, float* nocapture %B, i32 %N, i32 %IA, i32 %IB) nounwind uwtable readonly ssp {
+; CHECK-LABEL: define float @test
+; CHECK-SAME: (float* nocapture [[A:%.*]], float* nocapture [[B:%.*]], i32 [[N:%.*]], i32 [[IA:%.*]], i32 [[IB:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP1]], label [[WHILE_BODY_LR_PH:%.*]], label [[WHILE_END:%.*]]
+; CHECK: while.body.lr.ph:
+; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[IA]] to i64
+; CHECK-NEXT: [[IDX_EXT2:%.*]] = sext i32 [[IB]] to i64
+; CHECK-NEXT: [[TMP0:%.*]] = shl nsw i64 [[IDX_EXT]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = shl nsw i64 [[IDX_EXT2]], 2
+; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
+; CHECK: while.body:
+; CHECK-NEXT: [[LSR_IV2:%.*]] = phi float* [ [[TMP5:%.*]], [[WHILE_BODY]] ], [ [[B]], [[WHILE_BODY_LR_PH]] ]
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi float* [ [[TMP4:%.*]], [[WHILE_BODY]] ], [ [[A]], [[WHILE_BODY_LR_PH]] ]
+; CHECK-NEXT: [[N_ADDR_03:%.*]] = phi i32 [ [[N]], [[WHILE_BODY_LR_PH]] ], [ [[SUB:%.*]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[SUM0_02:%.*]] = phi float [ 0.000000e+00, [[WHILE_BODY_LR_PH]] ], [ [[ADD:%.*]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[LSR_IV1:%.*]] = bitcast float* [[LSR_IV]] to i1*
+; CHECK-NEXT: [[LSR_IV23:%.*]] = bitcast float* [[LSR_IV2]] to i1*
+; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[LSR_IV]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = load float, float* [[LSR_IV2]], align 4
+; CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP2]], [[TMP3]]
+; CHECK-NEXT: [[ADD]] = fadd float [[SUM0_02]], [[MUL]]
+; CHECK-NEXT: [[SUB]] = add nsw i32 [[N_ADDR_03]], -1
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i1, i1* [[LSR_IV1]], i64 [[TMP0]]
+; CHECK-NEXT: [[TMP4]] = bitcast i1* [[SCEVGEP]] to float*
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i1, i1* [[LSR_IV23]], i64 [[TMP1]]
+; CHECK-NEXT: [[TMP5]] = bitcast i1* [[SCEVGEP4]] to float*
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 0
+; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_END_LOOPEXIT:%.*]]
+; CHECK: while.end.loopexit:
+; CHECK-NEXT: br label [[WHILE_END]]
+; CHECK: while.end:
+; CHECK-NEXT: [[SUM0_0_LCSSA:%.*]] = phi float [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[ADD]], [[WHILE_END_LOOPEXIT]] ]
+; CHECK-NEXT: ret float [[SUM0_0_LCSSA]]
+;
entry:
%cmp1 = icmp sgt i32 %N, 0
br i1 %cmp1, label %while.body.lr.ph, label %while.end
diff --git a/llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll b/llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
index 519a277547ba5..4e4e81547f637 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/2011-12-19-PostincQuadratic.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 -loop-reduce -S < %s | FileCheck %s
;
; PR11571: handle a postinc user outside of for.body7 that requires
@@ -9,16 +10,31 @@ target triple = "i386-unknown-freebsd10.0"
@b = external global [121 x i32]
-; CHECK-LABEL: @vb(
-; Outer recurrence:
-; CHECK: %lsr.iv1 = phi [121 x i32]*
-; Inner recurrence:
-; CHECK: %lsr.iv = phi i32
-; Outer step (relative to inner recurrence):
-; CHECK: %scevgep = getelementptr i1, i1* %{{.*}}, i32 %lsr.iv
-; Outer use:
-; CHECK: %lsr.iv3 = phi [121 x i32]* [ %lsr.iv1, %for.body43.preheader ]
define void @vb() nounwind {
+; CHECK-LABEL: define void @vb
+; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: for.cond.preheader:
+; CHECK-NEXT: br label [[FOR_BODY7:%.*]]
+; CHECK: for.body7:
+; CHECK-NEXT: [[LSR_IV1:%.*]] = phi [121 x i32]* [ [[TMP0:%.*]], [[FOR_BODY7]] ], [ bitcast (i32* getelementptr inbounds ([121 x i32], [121 x i32]* @b, i32 0, i32 1) to [121 x i32]*), [[FOR_COND_PREHEADER:%.*]] ]
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY7]] ], [ 8, [[FOR_COND_PREHEADER]] ]
+; CHECK-NEXT: [[INDVARS_IV77:%.*]] = phi i32 [ [[INDVARS_IV_NEXT78:%.*]], [[FOR_BODY7]] ], [ 1, [[FOR_COND_PREHEADER]] ]
+; CHECK-NEXT: [[LSR_IV12:%.*]] = bitcast [121 x i32]* [[LSR_IV1]] to i1*
+; CHECK-NEXT: [[INDVARS_IV_NEXT78]] = add i32 [[INDVARS_IV77]], 1
+; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i32 [[LSR_IV]], 4
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i1, i1* [[LSR_IV12]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[TMP0]] = bitcast i1* [[SCEVGEP]] to [121 x i32]*
+; CHECK-NEXT: br i1 true, label [[FOR_BODY43_PREHEADER:%.*]], label [[FOR_BODY7]]
+; CHECK: for.body43.preheader:
+; CHECK-NEXT: br label [[FOR_BODY43:%.*]]
+; CHECK: for.body43:
+; CHECK-NEXT: [[LSR_IV3:%.*]] = phi [121 x i32]* [ [[LSR_IV1]], [[FOR_BODY43_PREHEADER]] ], [ [[TMP1:%.*]], [[FOR_BODY43]] ]
+; CHECK-NEXT: [[LSR_IV35:%.*]] = bitcast [121 x i32]* [[LSR_IV3]] to i32*
+; CHECK-NEXT: [[T2:%.*]] = load i32, i32* [[LSR_IV35]], align 4
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr [121 x i32], [121 x i32]* [[LSR_IV3]], i32 0, i32 1
+; CHECK-NEXT: [[TMP1]] = bitcast i32* [[SCEVGEP4]] to [121 x i32]*
+; CHECK-NEXT: br label [[FOR_BODY43]]
+;
for.cond.preheader:
br label %for.body7
diff --git a/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll b/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll
index f885998065d61..a4b59a9f48495 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memcpy.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -opaque-pointers=0 -mtriple=arm64-unknown-unknown -mcpu=cyclone -pre-RA-sched=list-hybrid < %s | FileCheck %s
; rdar://10232252
; Prevent LSR of doing poor choice that cannot be folded in addressing mode
@@ -6,12 +7,25 @@
; <rdar://problem/12702735> [ARM64][coalescer] need better register
; coalescing for simple unit tests.
-; CHECK: testCase
-; CHECK: %while.body{{$}}
-; CHECK: ldr [[STREG:x[0-9]+]], [{{x[0-9]+}}], #8
-; CHECK-NEXT: str [[STREG]], [{{x[0-9]+}}], #8
-; CHECK: %while.end
define i32 @testCase() nounwind ssp {
+; CHECK-LABEL: testCase:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w8, #1288 // =0x508
+; CHECK-NEXT: mov x9, #4294967296 // =0x100000000
+; CHECK-NEXT: mov x10, #6442450944 // =0x180000000
+; CHECK-NEXT: .LBB0_1: // %while.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr x11, [x9], #8
+; CHECK-NEXT: str x11, [x10], #8
+; CHECK-NEXT: subs x8, x8, #8
+; CHECK-NEXT: b.pl .LBB0_1
+; CHECK-NEXT: // %bb.2: // %while.end
+; CHECK-NEXT: mov x8, #6442450944 // =0x180000000
+; CHECK-NEXT: blr x8
+; CHECK-NEXT: mov w0, #0 // =0x0
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
br label %while.body
diff --git a/llvm/test/Transforms/LoopStrengthReduce/ivchain.ll b/llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
index f73f8c848abc9..b8ddf72b90b96 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/ivchain.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
; RUN: opt -opaque-pointers=0 -passes='require<scalar-evolution>,require<targetir>,loop(loop-reduce)' < %s -S | FileCheck %s
;
@@ -11,11 +12,32 @@ target datalayout = "n8:16:32:64"
%struct = type { i8*, i8*, i16, i64, i16, i16, i16, i64, i64, i16, i8*, i64, i64, i64 }
-; CHECK-LABEL: @test(
-; CHECK: for.body:
-; CHECK: lsr.iv = phi %struct
-; CHECK: br
define i32 @test(i8* %h, i32 %more) nounwind uwtable {
+; CHECK-LABEL: define i32 @test
+; CHECK-SAME: (i8* [[H:%.*]], i32 [[MORE:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 undef, label [[LAND_END238:%.*]], label [[RETURN:%.*]]
+; CHECK: land.end238:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi %struct* [ [[SCEVGEP:%.*]], [[SW_EPILOG:%.*]] ], [ undef, [[LAND_END238]] ]
+; CHECK-NEXT: [[COLUMN_N_0:%.*]] = phi i16 [ 0, [[LAND_END238]] ], [ [[INC601:%.*]], [[SW_EPILOG]] ]
+; CHECK-NEXT: [[LSR_IV1:%.*]] = bitcast %struct* [[LSR_IV]] to i64*
+; CHECK-NEXT: [[CONV250:%.*]] = sext i16 [[COLUMN_N_0]] to i32
+; CHECK-NEXT: [[ADD257:%.*]] = add nsw i32 [[CONV250]], 1
+; CHECK-NEXT: [[CONV258:%.*]] = trunc i32 [[ADD257]] to i16
+; CHECK-NEXT: [[CMP263:%.*]] = icmp ult i16 undef, 2
+; CHECK-NEXT: br label [[IF_END388:%.*]]
+; CHECK: if.end388:
+; CHECK-NEXT: [[CALL405:%.*]] = call signext i16 @SQLColAttribute(i8* undef, i16 zeroext [[CONV258]], i16 zeroext 1003, i8* null, i16 signext 0, i16* null, i64* [[LSR_IV1]]) #[[ATTR1:[0-9]+]]
+; CHECK-NEXT: br label [[SW_EPILOG]]
+; CHECK: sw.epilog:
+; CHECK-NEXT: [[INC601]] = add i16 [[COLUMN_N_0]], 1
+; CHECK-NEXT: [[SCEVGEP]] = getelementptr [[STRUCT:%.*]], %struct* [[LSR_IV]], i64 1
+; CHECK-NEXT: br label [[FOR_BODY]]
+; CHECK: return:
+; CHECK-NEXT: ret i32 1
+;
entry:
br i1 undef, label %land.end238, label %return
diff --git a/llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll b/llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
index eb6ca79c32736..ff983652dc096 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/nonintegral.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 -S -loop-reduce < %s | FileCheck %s
; Address Space 10 is non-integral. The optimizer is not allowed to use
@@ -5,13 +6,39 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12"
target triple = "x86_64-unknown-linux-gnu"
-define void @japi1__unsafe_getindex_65028(i64 addrspace(10)* %arg) {
-; CHECK-NOT: inttoptr
-; CHECK-NOT: ptrtoint
; How exactly SCEV chooses to materialize isn't all that important, as
; long as it doesn't try to round-trip through integers. As of this writing,
; it emits a byte-wise gep, which is fine.
-; CHECK: getelementptr i64, i64 addrspace(10)* {{.*}}, i64 {{.*}}
+define void @japi1__unsafe_getindex_65028(i64 addrspace(10)* %arg) {
+; CHECK-LABEL: define void @japi1__unsafe_getindex_65028
+; CHECK-SAME: (i64 addrspace(10)* [[ARG:%.*]]) {
+; CHECK-NEXT: top:
+; CHECK-NEXT: br label [[L86:%.*]]
+; CHECK: L86:
+; CHECK-NEXT: [[LSR_IV4:%.*]] = phi i64 [ [[LSR_IV_NEXT5:%.*]], [[L86]] ], [ -2, [[TOP:%.*]] ]
+; CHECK-NEXT: [[LSR_IV_NEXT5]] = add nsw i64 [[LSR_IV4]], 2
+; CHECK-NEXT: br i1 false, label [[L86]], label [[IF29:%.*]]
+; CHECK: if29:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i64, i64 addrspace(10)* [[ARG]], i64 -1
+; CHECK-NEXT: br label [[IF31:%.*]]
+; CHECK: if31:
+; CHECK-NEXT: %"#temp#1.sroa.0.022" = phi i64 [ 0, [[IF29]] ], [ [[TMP3_LCSSA:%.*]], [[IF38:%.*]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV_NEXT5]], %"#temp#1.sroa.0.022"
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i64, i64 addrspace(10)* [[SCEVGEP]], i64 [[TMP0]]
+; CHECK-NEXT: br label [[L119:%.*]]
+; CHECK: L119:
+; CHECK-NEXT: [[LSR_IV2:%.*]] = phi i64 addrspace(10)* [ [[SCEVGEP3:%.*]], [[L119]] ], [ [[SCEVGEP1]], [[IF31]] ]
+; CHECK-NEXT: [[I5_0:%.*]] = phi i64 [ %"#temp#1.sroa.0.022", [[IF31]] ], [ [[TMP3:%.*]], [[L119]] ]
+; CHECK-NEXT: [[TMP3]] = add i64 [[I5_0]], 1
+; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i64, i64 addrspace(10)* [[LSR_IV2]], i64 1
+; CHECK-NEXT: br i1 false, label [[L119]], label [[IF38]]
+; CHECK: if38:
+; CHECK-NEXT: [[TMP3_LCSSA]] = phi i64 [ [[TMP3]], [[L119]] ]
+; CHECK-NEXT: [[TMP6:%.*]] = load i64, i64 addrspace(10)* [[SCEVGEP3]], align 8
+; CHECK-NEXT: br i1 true, label [[DONE:%.*]], label [[IF31]]
+; CHECK: done:
+; CHECK-NEXT: ret void
+;
top:
br label %L86
diff --git a/llvm/test/Transforms/LoopStrengthReduce/shl.ll b/llvm/test/Transforms/LoopStrengthReduce/shl.ll
index 308060e3b59d7..4a2136c484f20 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/shl.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/shl.ll
@@ -1,14 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 < %s -loop-reduce -gvn -S | FileCheck %s
target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
+; LoopStrengthReduce should reuse %mul as the stride.
define void @_Z3fooPfll(float* nocapture readonly %input, i64 %n, i64 %s) {
-; CHECK-LABEL: @_Z3fooPfll(
+; CHECK-LABEL: define void @_Z3fooPfll
+; CHECK-SAME: (float* nocapture readonly [[INPUT:%.*]], i64 [[N:%.*]], i64 [[S:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[MUL:%.*]] = shl i64 [[S]], 2
+; CHECK-NEXT: tail call void @_Z3bazl(i64 [[MUL]])
+; CHECK-NEXT: [[CMP_5:%.*]] = icmp sgt i64 [[N]], 0
+; CHECK-NEXT: br i1 [[CMP_5]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.cond.cleanup.loopexit:
+; CHECK-NEXT: br label [[FOR_COND_CLEANUP]]
+; CHECK: for.cond.cleanup:
+; CHECK-NEXT: ret void
+; CHECK: for.body:
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi float* [ [[TMP1:%.*]], [[FOR_BODY]] ], [ [[INPUT]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[I_06:%.*]] = phi i64 [ [[ADD:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[LSR_IV1:%.*]] = bitcast float* [[LSR_IV]] to i1*
+; CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[LSR_IV]], align 4
+; CHECK-NEXT: tail call void @_Z3barf(float [[TMP0]])
+; CHECK-NEXT: [[ADD]] = add i64 [[I_06]], [[S]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i1, i1* [[LSR_IV1]], i64 [[MUL]]
+; CHECK-NEXT: [[TMP1]] = bitcast i1* [[SCEVGEP]] to float*
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[ADD]], [[N]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]]
+;
entry:
%mul = shl nsw i64 %s, 2
-; CHECK: %mul = shl i64 %s, 2
tail call void @_Z3bazl(i64 %mul) #2
-; CHECK-NEXT: call void @_Z3bazl(i64 %mul)
%cmp.5 = icmp sgt i64 %n, 0
br i1 %cmp.5, label %for.body.preheader, label %for.cond.cleanup
@@ -24,8 +48,6 @@ for.cond.cleanup: ; preds = %for.cond.cleanup.lo
for.body: ; preds = %for.body.preheader, %for.body
%i.06 = phi i64 [ %add, %for.body ], [ 0, %for.body.preheader ]
%arrayidx = getelementptr inbounds float, float* %input, i64 %i.06
-; LoopStrengthReduce should reuse %mul as the stride.
-; CHECK: getelementptr i1, i1* {{[^,]+}}, i64 %mul
%0 = load float, float* %arrayidx, align 4
tail call void @_Z3barf(float %0) #2
%add = add nsw i64 %i.06, %s
diff --git a/llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll b/llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
index 06d489aaba953..2f4a11079d51a 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/uglygep-address-space.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
; LSR shouldn't consider %t8 to be an interesting user of %t6, and it
@@ -9,7 +10,31 @@ target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-
; This tests expandAddToGEP uses the right smaller integer type for
; another address space
define void @Z4(i8 addrspace(1)* %ptr.i8, float addrspace(1)* addrspace(1)* %ptr.float) {
-; CHECK: define void @Z4
+; CHECK-LABEL: define void @Z4
+; CHECK-SAME: (i8 addrspace(1)* [[PTR_I8:%.*]], float addrspace(1)* addrspace(1)* [[PTR_FLOAT:%.*]]) {
+; CHECK-NEXT: bb:
+; CHECK-NEXT: br label [[BB3:%.*]]
+; CHECK: bb1:
+; CHECK-NEXT: br i1 true, label [[BB10:%.*]], label [[BB2:%.*]]
+; CHECK: bb2:
+; CHECK-NEXT: [[T:%.*]] = add i16 [[T4:%.*]], 1
+; CHECK-NEXT: br label [[BB3]]
+; CHECK: bb3:
+; CHECK-NEXT: [[T4]] = phi i16 [ [[T]], [[BB2]] ], [ 0, [[BB:%.*]] ]
+; CHECK-NEXT: br label [[BB1:%.*]]
+; CHECK: bb10:
+; CHECK-NEXT: [[T7:%.*]] = icmp eq i16 [[T4]], 0
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8 addrspace(1)* [[PTR_I8]], i16 [[T4]]
+; CHECK-NEXT: br label [[BB14:%.*]]
+; CHECK: bb14:
+; CHECK-NEXT: store i8 undef, i8 addrspace(1)* [[SCEVGEP]], align 1
+; CHECK-NEXT: [[T6:%.*]] = load float addrspace(1)*, float addrspace(1)* addrspace(1)* [[PTR_FLOAT]], align 2
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr float, float addrspace(1)* [[T6]], i16 4
+; CHECK-NEXT: [[SCEVGEP12:%.*]] = bitcast float addrspace(1)* [[SCEVGEP1]] to i8 addrspace(1)*
+; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, i8 addrspace(1)* [[SCEVGEP12]], i16 [[T4]]
+; CHECK-NEXT: store i8 undef, i8 addrspace(1)* [[SCEVGEP3]], align 1
+; CHECK-NEXT: br label [[BB14]]
+;
bb:
br label %bb3
@@ -24,26 +49,11 @@ bb3: ; preds = %bb2, %bb
%t4 = phi i16 [ %t, %bb2 ], [ 0, %bb ] ; <i16> [#uses=3]
br label %bb1
-; CHECK: bb10:
-; CHECK-NEXT: %t7 = icmp eq i16 %t4, 0
-; Host %t2 computation outside the loop.
-; CHECK-NEXT: [[SCEVGEP:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* %ptr.i8, i16 %t4
-; CHECK-NEXT: br label %bb14
bb10: ; preds = %bb9
%t7 = icmp eq i16 %t4, 0 ; <i1> [#uses=1]
%t3 = add i16 %t4, 16 ; <i16> [#uses=1]
br label %bb14
-; CHECK: bb14:
-; CHECK-NEXT: store i8 undef, i8 addrspace(1)* [[SCEVGEP]]
-; CHECK-NEXT: %t6 = load float addrspace(1)*, float addrspace(1)* addrspace(1)* %ptr.float
-; Fold %t3's add within the address.
-; CHECK-NEXT: [[SCEVGEP1:%[^ ]+]] = getelementptr float, float addrspace(1)* %t6, i16 4
-; CHECK-NEXT: [[SCEVGEP2:%[^ ]+]] = bitcast float addrspace(1)* [[SCEVGEP1]] to i8 addrspace(1)*
-; Use the induction variable (%t4) to access the right element
-; CHECK-NEXT: [[ADDRESS:%[^ ]+]] = getelementptr i8, i8 addrspace(1)* [[SCEVGEP2]], i16 %t4
-; CHECK-NEXT: store i8 undef, i8 addrspace(1)* [[ADDRESS]]
-; CHECK-NEXT: br label %bb14
bb14: ; preds = %bb14, %bb10
%t2 = getelementptr inbounds i8, i8 addrspace(1)* %ptr.i8, i16 %t4 ; <i8*> [#uses=1]
store i8 undef, i8 addrspace(1)* %t2
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