[PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present

[Corbin Robeck via Phabricator via llvm-commits]

crobeck updated this revision to Diff 533956.
crobeck added a comment.

invert to reserve register by default and then have pass remove the register if unneeded


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149775/new/

https://reviews.llvm.org/D149775

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.h
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/lib/Target/AMDGPU/CMakeLists.txt
  llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
  llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
  llvm/test/CodeGen/AMDGPU/literal-constant-like-operand-instruction-size.ll
  llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
  llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
  llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
  llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

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