[PATCH] D153620: [X86] Combine MUL+SRL+TRUNC to MULX for i32 on 64-bit

[Phoebe Wang via Phabricator via llvm-commits]

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D153576 <https://reviews.llvm.org/D153576> brought `_mulx_u32` to 64-bit targets. But the lowering of it
doesn't satisfy `does not read or write arithmetic flags` described in
intrinsic guide: https://godbolt.org/z/xb1fjf1sM

This patch completes the lowering part through combining
(i32 (trunc (shr (mul (zext (i32 A)), (zext (i32 B))), 32)))
to (umul_lohi (i32 A), (i32 B))

It is also a general optimization.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153620

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/bmi2.ll
  llvm/test/CodeGen/X86/smul_fix.ll
  llvm/test/CodeGen/X86/smul_fix_sat.ll
  llvm/test/CodeGen/X86/umul_fix.ll
  llvm/test/CodeGen/X86/umul_fix_sat.ll
  llvm/test/CodeGen/X86/vector-mulfix-legalize.ll

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