[PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:757
+    : SubtargetFeature<"xsfcie", "HasVendorXSfcie", "true",
+                       "'XSfcie' (SiFive Custom Instruction Extension SCIE for S76.)">;
+def HasVendorXSfcie : Predicate<"Subtarget->hasVendorXSfcie()">,
----------------
Drop "for S76"


================
Comment at: llvm/test/MC/RISCV/xsfcie-invalid.s:5
+
+csrr t1, mbpm # CHECK: :[[@LINE]]:10: error: system register use requires an option to be enabled
+
----------------
Are we able to tell the user which option?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153499/new/

https://reviews.llvm.org/D153499