[PATCH] D153502: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6049
+    // Check if the two compare instructions have a common operand.
+    return LHS0 == RHS0 || LHS1 == RHS1;
+  };
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What is LHS0 == RHS1 or LHS1 == RHS0 and CCL is the opposite of condition CCR?


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6077
+    SDValue Operand2;
+    bool isCommonValueAtRight = false;
+    if (LHS0 == RHS0) {
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Capitalize variable name


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6087
+      Operand2 = RHS0;
+      isCommonValueAtRight = true;
+    }
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Could we invert the condition code so that the common value is always on the "left"? Then we don't need a bool and could simplify the next if.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153502/new/

https://reviews.llvm.org/D153502