[PATCH] D143759: [AMDGPU] Implement whole wave register spill

Yashwant Singh via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 22 23:28:17 PDT 2023


yassingh updated this revision to Diff 533866.
yassingh added a comment.

- review comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143759/new/

https://reviews.llvm.org/D143759

Files:
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp


Index: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -2222,9 +2222,9 @@
           *MBB, MI, DL, Opc, Index, VData->getReg(), VData->isKill(), FrameReg,
           TII->getNamedOperand(*MI, AMDGPU::OpName::offset)->getImm(),
           *MI->memoperands_begin(), RS);
-      if (IsWWMRegSpill) 
+      if (IsWWMRegSpill) {
         TII->restoreExec(*MF, *MBB, MI, DL, MFI->getSGPRForEXECCopy());
-  
+      }
       MI->eraseFromParent();
       return true;
     }


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