[llvm] 3a57152 - [LSR] Return nullptr from getExpr if the result isn't invertible.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 22 11:11:02 PDT 2023
Author: Florian Hahn
Date: 2023-06-22T19:10:48+01:00
New Revision: 3a57152d85e1b9f993871d550846f193ab91450c
URL: https://github.com/llvm/llvm-project/commit/3a57152d85e1b9f993871d550846f193ab91450c
DIFF: https://github.com/llvm/llvm-project/commit/3a57152d85e1b9f993871d550846f193ab91450c.diff
LOG: [LSR] Return nullptr from getExpr if the result isn't invertible.
getExpr is missing a check to make sure the result is invertible.
This can lead to incorrect results, so return nullptr in those cases
like in other places in IVUsers.
Fixes #62660.
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D153202
Added:
Modified:
llvm/include/llvm/Analysis/IVUsers.h
llvm/lib/Analysis/IVUsers.cpp
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/IVUsers.h b/llvm/include/llvm/Analysis/IVUsers.h
index e5a4960376911..6b9b6bf190f1c 100644
--- a/llvm/include/llvm/Analysis/IVUsers.h
+++ b/llvm/include/llvm/Analysis/IVUsers.h
@@ -131,7 +131,8 @@ class IVUsers {
/// value of the OperandValToReplace of the given IVStrideUse.
const SCEV *getReplacementExpr(const IVStrideUse &IU) const;
- /// getExpr - Return the expression for the use.
+ /// getExpr - Return the expression for the use. Returns nullptr if the result
+ /// is not invertible.
const SCEV *getExpr(const IVStrideUse &IU) const;
const SCEV *getStride(const IVStrideUse &IU, const Loop *L) const;
diff --git a/llvm/lib/Analysis/IVUsers.cpp b/llvm/lib/Analysis/IVUsers.cpp
index 830211658353a..665d4eacaf5ca 100644
--- a/llvm/lib/Analysis/IVUsers.cpp
+++ b/llvm/lib/Analysis/IVUsers.cpp
@@ -334,8 +334,15 @@ const SCEV *IVUsers::getReplacementExpr(const IVStrideUse &IU) const {
/// getExpr - Return the expression for the use.
const SCEV *IVUsers::getExpr(const IVStrideUse &IU) const {
- return normalizeForPostIncUse(getReplacementExpr(IU), IU.getPostIncLoops(),
- *SE);
+ const SCEV *Replacement = getReplacementExpr(IU);
+ const SCEV *Normalized =
+ normalizeForPostIncUse(Replacement, IU.getPostIncLoops(), *SE);
+ const SCEV *Denormalized =
+ denormalizeForPostIncUse(Normalized, IU.getPostIncLoops(), *SE);
+ // If the normalized expression isn't invertible.
+ if (Denormalized != Replacement)
+ return nullptr;
+ return Normalized;
}
static const SCEVAddRecExpr *findAddRecForLoop(const SCEV *S, const Loop *L) {
diff --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index 8b32052a29d37..b5854211e811c 100644
--- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -2707,6 +2707,8 @@ void LSRInstance::CollectInterestingTypesAndFactors() {
SmallVector<const SCEV *, 4> Worklist;
for (const IVStrideUse &U : IU) {
const SCEV *Expr = IU.getExpr(U);
+ if (!Expr)
+ continue;
// Collect interesting types.
Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
@@ -3325,6 +3327,8 @@ void LSRInstance::CollectFixupsAndInitialFormulae() {
}
const SCEV *S = IU.getExpr(U);
+ if (!S)
+ continue;
PostIncLoopSet TmpPostIncLoops = U.getPostIncLoops();
// Equality (== and !=) ICmps are special. We can rewrite (i == N) as
diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
index 1538a11544b9a..343520dabecab 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/pr62660-normalization-failure.ll
@@ -1,9 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -loop-reduce -verify-scev -S %s | FileCheck %s
-; XFAIL: *
-; REQUIRES: asserts
-
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macos"
@@ -12,11 +9,16 @@ define i64 @test_pr62660() {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
-; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i32 [ [[LSR_IV_NEXT2:%.*]], [[LOOP]] ], [ 65533, [[ENTRY:%.*]] ]
-; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ -1, [[ENTRY]] ]
+; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ -1, [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV]], 1
+; CHECK-NEXT: [[TMP:%.*]] = trunc i64 [[TMP0]] to i32
+; CHECK-NEXT: [[CONV1:%.*]] = and i32 [[TMP]], 65535
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[IV]], -1
+; CHECK-NEXT: [[SUB:%.*]] = add i32 [[ADD]], [[CONV1]]
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: [[LSR_IV_NEXT]] = add nsw i64 [[LSR_IV]], 1
-; CHECK-NEXT: [[LSR_IV_NEXT2]] = add nuw nsw i32 [[LSR_IV1]], 2
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[LSR_IV_NEXT2]], 8
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[SUB]], 8
; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i64 [[LSR_IV_NEXT]]
diff --git a/llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll b/llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
index 7fa9196bdc85f..8b271cee7cbd7 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/scaling-factor-incompat-type.ll
@@ -17,9 +17,15 @@ define void @foo() {
; CHECK: bb4:
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i16 [ [[LSR_IV_NEXT2:%.*]], [[BB13:%.*]] ], [ 6, [[BB:%.*]] ]
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT]], [[BB13]] ], [ 8589934593, [[BB]] ]
+; CHECK-NEXT: [[T5:%.*]] = phi i64 [ 2, [[BB]] ], [ [[T14:%.*]], [[BB13]] ]
+; CHECK-NEXT: [[T6:%.*]] = add i64 [[T5]], 4
+; CHECK-NEXT: [[T7:%.*]] = trunc i64 [[T6]] to i16
+; CHECK-NEXT: [[T8:%.*]] = urem i16 [[T7]], 3
+; CHECK-NEXT: [[T9:%.*]] = mul i16 [[T8]], 2
; CHECK-NEXT: [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 25769803776
; CHECK-NEXT: [[LSR_IV_NEXT2]] = add nuw nsw i16 [[LSR_IV1]], 6
-; CHECK-NEXT: [[T10:%.*]] = icmp eq i16 1, 0
+; CHECK-NEXT: [[T14]] = add nuw nsw i64 [[T5]], 6
+; CHECK-NEXT: [[T10:%.*]] = icmp eq i16 [[T9]], 1
; CHECK-NEXT: br i1 [[T10]], label [[BB11:%.*]], label [[BB13]]
; CHECK: bb11:
; CHECK-NEXT: [[T12:%.*]] = udiv i16 1, [[LSR_IV1]]
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