[PATCH] D143762: [AMDGPU] Enable whole wave register copy

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/SplitKit.cpp:567
   for (unsigned BestIdx : SubIndexes) {
     Def = buildSingleSubRegCopy(FromReg, ToReg, MBB, InsertBefore, BestIdx,
                                 DestLI, Late, Def);
----------------
You're missing the new opcode here. buildSingleSubRegCopy should gain a new MCInstrDesc & parameter for the opcode to use


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2419
+SIInstrInfo::isCopyInstrImpl(const MachineInstr &MI) const {
+  if (MI.getOpcode() == AMDGPU::COPY || MI.getOpcode() == AMDGPU::PRED_COPY)
+    return DestSourcePair{MI.getOperand(0), MI.getOperand(1)};
----------------
Regular copy shouldn't reach here?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:8004
+  const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+  if (SrcReg.isVirtual() &&
+      MFI->checkFlag(SrcReg, AMDGPU::VirtRegFlag::WWM_REG))
----------------
SrcReg.isVirtual should be implied


================
Comment at: llvm/lib/Target/AMDGPU/SILowerPredicatedCopies.cpp:140
+  bool Changed = false;
+
+  for (MachineBasicBlock &MBB : MF) {
----------------
Can you early return false if the WWM reg set is empty?


================
Comment at: llvm/lib/Target/AMDGPU/SILowerPredicatedCopies.cpp:143
+    for (MachineInstr &MI : MBB) {
+      if (MI.getOpcode() == AMDGPU::PRED_COPY) {
+        assert(TII->isVGPRCopy(MI));
----------------
continue and reduce indentation


================
Comment at: llvm/lib/Target/AMDGPU/SILowerPredicatedCopies.cpp:144
+      if (MI.getOpcode() == AMDGPU::PRED_COPY) {
+        assert(TII->isVGPRCopy(MI));
+        if (MI.getOperand(0).getReg().isVirtual() && isWWMCopy(MI, *TII)) {
----------------
Should add a TODO to try to reduce the saveexec/restore exec pairs for adjacent WWM ops


================
Comment at: llvm/lib/Target/AMDGPU/SILowerPredicatedCopies.cpp:159
+        LLVM_DEBUG(dbgs() << "Updated " << MI << " to use COPY opcode");
+        MI.setDesc(TII->get(AMDGPU::COPY));
+        Changed |= true;
----------------
Do these need to gain an implicit exec use?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143762/new/

https://reviews.llvm.org/D143762