[PATCH] D153575: [TargetLowering] Better code generation for ISD::SADDSAT/SSUBSAT when operand sign is known

[Dhruv Chawla via Phabricator via llvm-commits]

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When the sign of either of the operands is known, it is possible to
determine what the saturating value will be without having to compute it
using the sign bits.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153575

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/aarch64-saturating-arithmetic.ll
  llvm/test/CodeGen/X86/combine-add-ssat.ll

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