[PATCH] D153519: [LegalizeTypes] Widen insert_subvector ops for fixed insert into scalable

[Luke Lau via Phabricator via llvm-commits]

luke added a comment.

In D153519#4441316 <https://reviews.llvm.org/D153519#4441316>, @craig.topper wrote:

> Is it possible for the widened type to exceed the minimum vscale?

Yes, but I think that would still fall under the "If this condition cannot be determined statically but is
false at runtime, then the result vector is undefined." part of insert_subvector's definition. Since we currently already lower an insert_subvector of e.g. v8i32 into nxv4i32



================
Comment at: llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll:498
 
+define <vscale x 4 x i64> @insert_nxv4i64_nxv3i64(<3 x i64> %sv) {
+; CHECK-LABEL: insert_nxv4i64_nxv3i64:
----------------
craig.topper wrote:
> This test already passes. v3i64 widens to v4i64 which should be detected as less than or equal to nxv4i64.
Argh, copy and paste error, should be nxv2i64


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