[PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present

[Corbin Robeck via Phabricator via llvm-commits]

crobeck marked 2 inline comments as done.
crobeck added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1429
   SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
+  bool RegsFrozen = false;
 
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crobeck wrote:
> arsenm wrote:
> > The reserved registers should already be frozen before PEI. I think the current freezeReservedRegs call here was just never updated to use the new incremental reserveReg
> Just set both calls to reserveReg then?
I think I've convinced myself these can both just be reserveReg calls.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149775/new/

https://reviews.llvm.org/D149775