[PATCH] D153474: [RISCV] Improve SiFive7 for reductions and ordered reductions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVSchedSiFive7.td:669
+    let Latency = Cycles, ResourceCycles = [Cycles] in
+      defm "" : LMULSEWWriteResMXSEW<"WriteVIRedV_From", [SiFive7VA],
+                                     mx, sew, IsWorstCase>;
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I don't think we usually indent after a `let` if the `let` doesn't use braces.


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Comment at: llvm/lib/Target/RISCV/RISCVSchedSiFive7.td:696
+      // FIXME: this is wrong and needs to be fixed in this patch
+      defm "" : LMULSEWWriteResMXSEW<"WriteVFRedMinMaxV_From", [SiFive7VA],
+                                     mx, sew, IsWorstCase>;
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I think this has no Latency or ResourceCycles attached to it? The previous let did not create a scope


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153474/new/

https://reviews.llvm.org/D153474