[PATCH] D152834: A new code layout algorithm for function reordering [2/3]

[Sergey Pupyrev via Phabricator via llvm-commits]

spupyrev added a comment.

Hmm. I was using "cpu/event=0x85,umask=0x61/u" for i-TLB misses, which we got from `https://download.01.org/perfmon`, which has even been moved since then. Back in 2017 (when the algorithm was developed) we thought this is the "right" event to look at, but it might not be the case. Which one would you recommend to look at? I see this page <https://github.com/intel/perfmon/blob/main/SKL/events/skylake_core.json> has a good description.

Notice that when we use turn on huge pages, the amount of iTLB misses decreases by ~10x, and the absolute differences between A and B sides are much smaller than when no huge pages are used.


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https://reviews.llvm.org/D152834