[PATCH] D153000: [WIP][RISCV] Make all floating-point instructions SEW-aware

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td:1897
+                          string Constraint = "",
+                          int sew = 0> {
   let VLMul = MInfo.value in {
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What do you think about making `sew` a mandatory argument instead of using sew=0 as "don't account for sew". The scheduler models can always assign the same properties for different sew if the microarchitecture performance does not depend on sew.

I don't think we use sew=0 anywhere else and it may be simpler to keep it that way.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153000/new/

https://reviews.llvm.org/D153000