[PATCH] D143759: [AMDGPU] Implement whole wave register spill

Yashwant Singh via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 21 09:37:52 PDT 2023


yassingh added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:647
+  // SGPR used to preserve EXEC MASK around WWM spill/copy instructions.
+  Register ExecCopyReg = MFI->getSGPRForEXECCopy();
+  if (ExecCopyReg)
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arsenm wrote:
> D149775 is adding another reserved register, but I'm pretty sure they cannot contextually overlap. After both patches are in they should be consolidated to reuse the same reserved register
Will update once both lands. Added FIXME for now.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2150-2151
+      if (IsWWMRegSpill) {
+      TII->insertScratchExecCopy(*MF, *MBB, MI, DL, MFI->getSGPRForEXECCopy(),
+                                 RS->isRegUsed(AMDGPU::SCC));
+      }
----------------
cdevadas wrote:
> yassingh wrote:
> > Missed indenting, will fix it.
> Update the patch after clang-format.
Oh right, clang-format reverts the indentation. Going to leave it as it is, else clang-format will keep trying.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143759/new/

https://reviews.llvm.org/D143759



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