[llvm] e219dd8 - [RISCV] Add support for XCVmac extension in CV32E40P
QIHAN CAI via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 21 08:08:56 PDT 2023
Author: Qihan Cai
Date: 2023-06-21T23:08:49+08:00
New Revision: e219dd88d1b61153805742587a9ed7f96b9faecc
URL: https://github.com/llvm/llvm-project/commit/e219dd88d1b61153805742587a9ed7f96b9faecc
DIFF: https://github.com/llvm/llvm-project/commit/e219dd88d1b61153805742587a9ed7f96b9faecc.diff
LOG: [RISCV] Add support for XCVmac extension in CV32E40P
Implement XCVmac intrinsics for CV32E40P according to the specification.
This is the first commit of a patch-set to upstream the 7 vendor specific extensions of CV32E40P.
The patch-set aims at upstreaming the extensions on MC. The following will be on CodeGen, and the final patch-set will be on builtins if possible. The implemented version is on [0].
Contributors: @CharKeaney, Serkan Muhcu, @jeremybennett, @lewis-revill, @liaolucy, @simoncook, @xmj
Spec: https://github.com/openhwgroup/cv32e40p/blob/62bec66b36182215e18c9cf10f723567e23878e9/docs/source/instruction_set_extensions.rst
[0] https://github.com/openhwgroup/corev-llvm-project
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D152821
Added:
llvm/test/MC/RISCV/corev/XCVmac-invalid.s
llvm/test/MC/RISCV/corev/XCVmac-valid.s
Modified:
llvm/docs/RISCVUsage.rst
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Removed:
################################################################################
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 017e5c2aba782..5bf622cf44c06 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -282,3 +282,6 @@ The current vendor extensions supported are:
``XCVbitmanip``
LLVM implements `version 1.3.1 of the Core-V bit manipulation custom instructions specification <https://github.com/openhwgroup/cv32e40p/blob/62bec66b36182215e18c9cf10f723567e23878e9/docs/source/instruction_set_extensions.rst>`_ by Core-V. All instructions are prefixed with `cv.` as described in the specification.
+
+``XCVmac``
+ LLVM implements `version 1.3.1 of the Core-V Multiply-Accumulate (MAC) custom instructions specification <https://github.com/openhwgroup/cv32e40p/blob/4f024fe4b15a68b76615b0630c07a6745c620da7/docs/source/instruction_set_extensions.rst>`_ by Core-V. All instructions are prefixed with `cv.mac.` as described in the specification. These instructions are only available for riscv32 at this time.
diff --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index 202bfb4792550..cc1996a1c1702 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -561,6 +561,8 @@ DecodeStatus RISCVDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVbitmanip,
DecoderTableXCVbitmanip32,
"CORE-V Bit Manipulation custom opcode table");
+ TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXCVmac, DecoderTableXCVmac32,
+ "CORE-V MAC custom opcode table");
TRY_TO_DECODE(true, DecoderTable32, "RISCV32 table");
return MCDisassembler::Fail;
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 8243b34fb23c8..4b67f2b57cee5 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -760,6 +760,13 @@ def HasVendorXCVbitmanip : Predicate<"Subtarget->hasVendorXCVbitmanip()">,
AssemblerPredicate<(all_of FeatureVendorXCVbitmanip),
"'XCVbitmanip' (Bit Manipulation)">;
+def FeatureVendorXCVmac
+ : SubtargetFeature<"xcvmac", "HasVendorXCVmac", "true",
+ "'XCVmac' (Multiply-Accumulate)">;
+def HasVendorXCVmac : Predicate<"Subtarget->hasVendorXCVmac()">,
+ AssemblerPredicate<(all_of FeatureVendorXCVmac),
+ "'XCVmac' (Multiply-Accumulate)">;
+
//===----------------------------------------------------------------------===//
// LLVM specific features and extensions
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
index 3a69993ee96b0..60b0deb4907f1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
@@ -19,24 +19,24 @@ let DecoderNamespace = "XCVbitmanip" in {
let imm12 = {funct2, is3, is2};
}
- class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
+ class CVBitManipRII<bits<2> funct2, bits<3> funct3, string opcodestr,
Operand i3type = uimm5>
- : RVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
+ : RVInstBitManipRII<funct2, funct3, (outs GPR:$rd),
(ins GPR:$rs1, i3type:$is3, uimm5:$is2),
opcodestr, "$rd, $rs1, $is3, $is2">;
class CVBitManipRR<bits<7> funct7, string opcodestr>
- : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
+ : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
(ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
class CVBitManipR<bits<7> funct7, string opcodestr>
- : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
+ : RVInstR<funct7, 0b011, OPC_CUSTOM_1, (outs GPR:$rd),
(ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1"> {
let rs2 = 0b00000;
}
}
-let Predicates = [HasVendorXCVbitmanip, IsRV32],
+let Predicates = [HasVendorXCVbitmanip, IsRV32],
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
def CV_EXTRACT : CVBitManipRII<0b00, 0b000, "cv.extract">;
def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;
@@ -52,8 +52,8 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
def CV_INSERT : RVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
(ins GPR:$rd, GPR:$rs1, uimm5:$is3, uimm5:$is2),
"cv.insert", "$rd, $rs1, $is3, $is2">;
- def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
- (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+ def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
+ (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
"cv.insertr", "$rd, $rs1, $rs2">;
}
@@ -66,3 +66,117 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
def CV_CLB : CVBitManipR<0b0100011, "cv.clb">;
def CV_CNT : CVBitManipR<0b0100100, "cv.cnt">;
}
+
+class CVInstMac<bits<7> funct7, bits<3> funct3, dag outs, dag ins,
+ string opcodestr, string argstr, list<dag> pattern>
+ : RVInst<outs, ins, opcodestr, argstr, pattern, InstFormatOther> {
+ bits<5> rs2;
+ bits<5> rs1;
+ bits<5> rd;
+
+ let Inst{31-25} = funct7;
+ let Inst{24-20} = rs2;
+ let Inst{19-15} = rs1;
+ let Inst{14-12} = funct3;
+ let Inst{11-7} = rd;
+ let Opcode = OPC_CUSTOM_1.Value;
+ let DecoderNamespace = "XCVmac";
+}
+
+class CVInstMac16I<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
+ string opcodestr, string argstr, list<dag> pattern>
+ : RVInst<outs, ins, opcodestr, argstr, pattern, InstFormatOther> {
+ bits<5> imm5;
+ bits<5> rs2;
+ bits<5> rs1;
+ bits<5> rd;
+
+ let Inst{31-30} = funct2;
+ let Inst{29-25} = imm5;
+ let Inst{24-20} = rs2;
+ let Inst{19-15} = rs1;
+ let Inst{14-12} = funct3;
+ let Inst{11-7} = rd;
+ let Opcode = OPC_CUSTOM_2.Value;
+ let DecoderNamespace = "XCVmac";
+}
+
+let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Constraints = "$rd = $rd_wb" in {
+ // 32x32 bit macs
+ def CV_MAC : CVInstMac<0b1001000, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+ "cv.mac", "$rd, $rs1, $rs2", []>,
+ Sched<[]>;
+ def CV_MSU : CVInstMac<0b1001001, 0b011, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
+ "cv.msu", "$rd, $rs1, $rs2", []>,
+ Sched<[]>;
+
+ // Signed 16x16 bit macs with imm
+ def CV_MACSN : CVInstMac16I<0b00, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.macsn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACHHSN : CVInstMac16I<0b01, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.machhsn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACSRN : CVInstMac16I<0b10, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.macsrn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACHHSRN : CVInstMac16I<0b11, 0b110, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.machhsrn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+
+ // Unsigned 16x16 bit macs with imm
+ def CV_MACUN : CVInstMac16I<0b00, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.macun", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACHHUN : CVInstMac16I<0b01, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.machhun", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACURN : CVInstMac16I<0b10, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.macurn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MACHHURN : CVInstMac16I<0b11, 0b111, (outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.machhurn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0, Constraints = "$rd = $rd_wb"
+
+let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
+ // Signed 16x16 bit muls with imm
+ def CV_MULSN : CVInstMac16I<0b00, 0b100, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulsn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULHHSN : CVInstMac16I<0b01, 0b100, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulhhsn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULSRN : CVInstMac16I<0b10, 0b100, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulsrn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULHHSRN : CVInstMac16I<0b11, 0b100, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulhhsrn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+
+
+ // Unsigned 16x16 bit muls with imm
+ def CV_MULUN : CVInstMac16I<0b00, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulun", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULHHUN : CVInstMac16I<0b01, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulhhun", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULURN : CVInstMac16I<0b10, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulurn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+ def CV_MULHHURN : CVInstMac16I<0b11, 0b101, (outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2, uimm5:$imm5),
+ "cv.mulhhurn", "$rd, $rs1, $rs2, $imm5", []>,
+ Sched<[]>;
+} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0
+
+let Predicates = [HasVendorXCVmac, IsRV32] in {
+ // Xcvmac Pseudo Instructions
+ // Signed 16x16 bit muls
+ def : InstAlias<"cv.muls $rd1, $rs1, $rs2", (CV_MULSN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
+ def : InstAlias<"cv.mulhhs $rd1, $rs1, $rs2", (CV_MULHHSN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
+
+ // Unsigned 16x16 bit muls
+ def : InstAlias<"cv.mulu $rd1, $rs1, $rs2", (CV_MULUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
+ def : InstAlias<"cv.mulhhu $rd1, $rs1, $rs2", (CV_MULHHUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
+} // Predicates = [HasVendorXCVmac, IsRV32]
diff --git a/llvm/test/MC/RISCV/corev/XCVmac-invalid.s b/llvm/test/MC/RISCV/corev/XCVmac-invalid.s
new file mode 100644
index 0000000000000..e1a102cd8405a
--- /dev/null
+++ b/llvm/test/MC/RISCV/corev/XCVmac-invalid.s
@@ -0,0 +1,476 @@
+# RUN: not llvm-mc -triple=riscv32 --mattr=+xcvmac %s 2>&1 \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ERROR
+
+cv.mac t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mac t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mac 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mac t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.mac t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.machhsn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsrn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsrn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsrn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhsrn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsrn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsrn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhsrn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.machhsrn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhun t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhun t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhun t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhun t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhun t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhun 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhun t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.machhun t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhurn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhurn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhurn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.machhurn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhurn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhurn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.machhurn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.machhurn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.macsn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsrn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsrn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsrn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macsrn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsrn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsrn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macsrn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.macsrn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macun t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macun t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macun t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macun t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macun t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macun 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macun t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.macun t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macurn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macurn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macurn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.macurn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macurn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macurn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.macurn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.macurn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.msu t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.msu t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.msu 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.msu t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.msu t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhs t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhs t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhs 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhs t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhs t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhsn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsrn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsrn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsrn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhsrn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsrn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsrn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhsrn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhsrn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhu t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhu t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhu 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhu t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhu t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhun t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhun t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhun t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhun t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhun t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhun 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhun t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhun t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhurn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhurn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhurn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulhhurn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhurn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhurn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulhhurn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulhhurn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.muls t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.muls t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.muls 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.muls t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.muls t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulsn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsrn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsrn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsrn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulsrn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsrn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsrn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulsrn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulsrn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulu t0, t1, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulu t0, 0, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulu 0, t1, t2
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulu t0, t1
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulu t0, t1, t2, t4
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulun t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulun t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulun t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulun t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulun t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulun 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulun t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulun t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulurn t0, t1, t2, -1
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulurn t0, t1, t2, 32
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulurn t0, t1, t2, a0
+# CHECK-ERROR: immediate must be an integer in the range [0, 31]
+
+cv.mulurn t0, t1, 0, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulurn t0, 0, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulurn 0, t1, t2, 0
+# CHECK-ERROR: invalid operand for instruction
+
+cv.mulurn t0, t1, t2
+# CHECK-ERROR: too few operands for instruction
+
+cv.mulurn t0, t1, t2, 0, a0
+# CHECK-ERROR: invalid operand for instruction
diff --git a/llvm/test/MC/RISCV/corev/XCVmac-valid.s b/llvm/test/MC/RISCV/corev/XCVmac-valid.s
new file mode 100644
index 0000000000000..72ae6829eadc5
--- /dev/null
+++ b/llvm/test/MC/RISCV/corev/XCVmac-valid.s
@@ -0,0 +1,308 @@
+# RUN: llvm-mc -triple=riscv32 --mattr=+xcvmac -riscv-no-aliases -show-encoding %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INSTR
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+xcvmac < %s \
+# RUN: | llvm-objdump --mattr=+xcvmac -M no-aliases -d -r - \
+# RUN: | FileCheck --check-prefix=CHECK-INSTR %s
+# RUN: not llvm-mc -triple riscv32 %s 2>&1 \
+# RUN: | FileCheck -check-prefix=CHECK-NO-EXT %s
+
+cv.mac t0, t1, t2
+# CHECK-INSTR: cv.mac t0, t1, t2
+# CHECK-ENCODING: [0xab,0x32,0x73,0x90]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mac t0, t1, zero
+# CHECK-INSTR: cv.mac t0, t1, zero
+# CHECK-ENCODING: [0xab,0x32,0x03,0x90]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsn t0, t1, t2, 0
+# CHECK-INSTR: cv.machhsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x62,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsn t0, t1, zero, 16
+# CHECK-INSTR: cv.machhsn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x62,0x03,0x60]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsn t0, t1, zero, 31
+# CHECK-INSTR: cv.machhsn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x62,0x03,0x7e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsrn t0, t1, t2, 0
+# CHECK-INSTR: cv.machhsrn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x62,0x73,0xc0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsrn t0, t1, zero, 16
+# CHECK-INSTR: cv.machhsrn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x62,0x03,0xe0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhsrn t0, t1, zero, 31
+# CHECK-INSTR: cv.machhsrn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x62,0x03,0xfe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhun t0, t1, t2, 0
+# CHECK-INSTR: cv.machhun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x72,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhun t0, t1, zero, 16
+# CHECK-INSTR: cv.machhun t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x72,0x03,0x60]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhun t0, t1, zero, 31
+# CHECK-INSTR: cv.machhun t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x72,0x03,0x7e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhurn t0, t1, t2, 0
+# CHECK-INSTR: cv.machhurn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x72,0x73,0xc0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhurn t0, t1, zero, 16
+# CHECK-INSTR: cv.machhurn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x72,0x03,0xe0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.machhurn t0, t1, zero, 31
+# CHECK-INSTR: cv.machhurn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x72,0x03,0xfe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsn t0, t1, t2, 0
+# CHECK-INSTR: cv.macsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x62,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsn t0, t1, zero, 16
+# CHECK-INSTR: cv.macsn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x62,0x03,0x20]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsn t0, t1, zero, 31
+# CHECK-INSTR: cv.macsn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x62,0x03,0x3e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsrn t0, t1, t2, 0
+# CHECK-INSTR: cv.macsrn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x62,0x73,0x80]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsrn t0, t1, zero, 16
+# CHECK-INSTR: cv.macsrn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x62,0x03,0xa0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macsrn t0, t1, zero, 31
+# CHECK-INSTR: cv.macsrn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x62,0x03,0xbe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macun t0, t1, t2, 0
+# CHECK-INSTR: cv.macun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x72,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macun t0, t1, zero, 16
+# CHECK-INSTR: cv.macun t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x72,0x03,0x20]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macun t0, t1, zero, 31
+# CHECK-INSTR: cv.macun t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x72,0x03,0x3e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macurn t0, t1, t2, 0
+# CHECK-INSTR: cv.macurn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x72,0x73,0x80]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macurn t0, t1, zero, 16
+# CHECK-INSTR: cv.macurn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x72,0x03,0xa0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.macurn t0, t1, zero, 31
+# CHECK-INSTR: cv.macurn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x72,0x03,0xbe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.msu t0, t1, t2
+# CHECK-INSTR: cv.msu t0, t1, t2
+# CHECK-ENCODING: [0xab,0x32,0x73,0x92]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.msu t0, t1, zero
+# CHECK-INSTR: cv.msu t0, t1, zero
+# CHECK-ENCODING: [0xab,0x32,0x03,0x92]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhs t0, t1, t2
+# CHECK-INSTR: cv.mulhhsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhs t0, t1, zero
+# CHECK-INSTR: cv.mulhhsn t0, t1, zero, 0
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulhhsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulhhsn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x60]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulhhsn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x7e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsrn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulhhsrn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0xc0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsrn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulhhsrn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x42,0x03,0xe0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhsrn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulhhsrn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x42,0x03,0xfe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhu t0, t1, t2
+# CHECK-INSTR: cv.mulhhun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhu t0, t1, zero
+# CHECK-INSTR: cv.mulhhun t0, t1, zero, 0
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhun t0, t1, t2, 0
+# CHECK-INSTR: cv.mulhhun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0x40]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+
+cv.mulhhun t0, t1, zero, 16
+# CHECK-INSTR: cv.mulhhun t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x60]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhun t0, t1, zero, 31
+# CHECK-INSTR: cv.mulhhun t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x7e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhurn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulhhurn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0xc0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhurn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulhhurn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x52,0x03,0xe0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulhhurn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulhhurn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x52,0x03,0xfe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.muls t0, t1, t2
+# CHECK-INSTR: cv.mulsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.muls t0, t1, zero
+# CHECK-INSTR: cv.mulsn t0, t1, zero, 0
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulsn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulsn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x20]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulsn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x42,0x03,0x3e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsrn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulsrn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x42,0x73,0x80]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsrn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulsrn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x42,0x03,0xa0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulsrn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulsrn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x42,0x03,0xbe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulu t0, t1, t2
+# CHECK-INSTR: cv.mulun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulu t0, t1, zero
+# CHECK-INSTR: cv.mulun t0, t1, zero, 0
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulun t0, t1, t2, 0
+# CHECK-INSTR: cv.mulun t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0x00]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulun t0, t1, zero, 16
+# CHECK-INSTR: cv.mulun t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x20]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulun t0, t1, zero, 31
+# CHECK-INSTR: cv.mulun t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x52,0x03,0x3e]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulurn t0, t1, t2, 0
+# CHECK-INSTR: cv.mulurn t0, t1, t2, 0
+# CHECK-ENCODING: [0xdb,0x52,0x73,0x80]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulurn t0, t1, zero, 16
+# CHECK-INSTR: cv.mulurn t0, t1, zero, 16
+# CHECK-ENCODING: [0xdb,0x52,0x03,0xa0]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
+
+cv.mulurn t0, t1, zero, 31
+# CHECK-INSTR: cv.mulurn t0, t1, zero, 31
+# CHECK-ENCODING: [0xdb,0x52,0x03,0xbe]
+# CHECK-NO-EXT: instruction requires the following: 'XCVmac' (Multiply-Accumulate){{$}}
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