[PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added a comment.

Add a test for MIR serialization.



================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp:106
+  }
+  // just assume 8 bytes per instruction
+  Offset = 8 * NumInstr;
----------------
Capitalize.


================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp:117
+
+  // approximate code size and offsets of each basic block
+  generateBlockInfo();
----------------
Capitalize.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1445
       FuncInfo->setVGPRForAGPRCopy(UnusedLowVGPR);
       MRI.freezeReservedRegs(MF);
+      RegsFrozen = true;
----------------
Unify the `freezeReservedRegs` at the end of the function?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:2553
   MachineRegisterInfo &MRI = MF->getRegInfo();
+  SIMachineFunctionInfo *MFI = MF->getInfo<SIMachineFunctionInfo>();
 
----------------
const


Repository:
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  https://reviews.llvm.org/D149775/new/

https://reviews.llvm.org/D149775