[PATCH] D143759: [AMDGPU] Implement whole wave register spill
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 21 06:51:23 PDT 2023
cdevadas added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2150-2151
+ if (IsWWMRegSpill) {
+ TII->insertScratchExecCopy(*MF, *MBB, MI, DL, MFI->getSGPRForEXECCopy(),
+ RS->isRegUsed(AMDGPU::SCC));
+ }
----------------
yassingh wrote:
> Missed indenting, will fix it.
Update the patch after clang-format.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143759/new/
https://reviews.llvm.org/D143759
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