[PATCH] D152437: PowerPC/SPE: Add phony registers for high halves of SPE SuperRegs

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:2333
+    // In case of SPE we only have SuperRegs and CRs
+    // in our CalleSaveInfo vector.
+
----------------
This looks like you're working around inaccurate CSR regmasks. You should try adjusting those instead 


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Comment at: llvm/lib/Target/PowerPC/PPCFrameLowering.cpp:2338
+      const MCPhysReg &Reg = CalleeSaveReg.getReg();
+      const MCPhysReg &Lower = RegInfo->getSubReg(Reg, 1);
+      const MCPhysReg &Higher = RegInfo->getSubReg(Reg, 2);
----------------
Don't use reference to MCPhysReg


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152437/new/

https://reviews.llvm.org/D152437