[PATCH] D153288: [AArch64] Add SVE lowering for vector.reduce.fminimum and fmaximum

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

I was avoiding the fixed-length SVE, as the nodes were not marked custom they would go via the existing expansion. I can add support for them here too though, it's only two extra lines and a number of copied tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153288/new/

https://reviews.llvm.org/D153288