[PATCH] D153288: [AArch64] Add SVE lowering for vector.reduce.fminimum and fmaximum

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13578-13581
+    case ISD::VECREDUCE_FMAXIMUM:
+      return LowerReductionToSVE(AArch64ISD::FMAXV_PRED, Op, DAG);
+    case ISD::VECREDUCE_FMINIMUM:
+      return LowerReductionToSVE(AArch64ISD::FMINV_PRED, Op, DAG);
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This code also affect fixed length SVE code generation, which means we'll need tests within `sve-fixed-length-fp-reduce.ll` and `sve-streaming-mode-fixed-length-fp-reduce.ll` as well.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153288/new/

https://reviews.llvm.org/D153288