[PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

I think this may not hard break mesa. I believe mesa bypasses the intrinsic creation API, and just declares the string name of the intrinsic. The type name mangling suffix is technically irrelevant, and as long as you use a consistent type with a consistent suffix things should work out (and the null suffix also works). After committing mesa should still move to adding the type suffix



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Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll:13
 define amdgpu_kernel void @test_readlane_sreg_sreg(i32 %src0, i32 %src1) #1 {
   %readlane = call i32 @llvm.amdgcn.readlane(i32 %src0, i32 %src1)
   call void asm sideeffect "; use $0", "s"(i32 %readlane)
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This is a hint mesa won't break


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  https://reviews.llvm.org/D147732/new/

https://reviews.llvm.org/D147732