[llvm] 37db9ca - [llc][MISched] Add `-misched-detail-resource-booking` to llc.
Francesco Petrogalli via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 20 02:48:04 PDT 2023
Author: Francesco Petrogalli
Date: 2023-06-20T11:46:27+02:00
New Revision: 37db9cae2bc0d26d8f3f19750739ca0a636f3a29
URL: https://github.com/llvm/llvm-project/commit/37db9cae2bc0d26d8f3f19750739ca0a636f3a29
DIFF: https://github.com/llvm/llvm-project/commit/37db9cae2bc0d26d8f3f19750739ca0a636f3a29.diff
LOG: [llc][MISched] Add `-misched-detail-resource-booking` to llc.
The option `-misched-detail-resource-booking` prints the following
information every time the method
`SchedBoundary::getNextResourceCycle` is invoked:
1. counters of the resources that have already been booked;
2. the values returned by `getNextResourceCycle`, which is the next
available cycle in which a resource can be booked.
The method is useful to debug low-level checks inside the machine
scheduler that make decisions based on the values returned by
`getNextResourceCycle`.
Reviewed By: andreadb
Differential Revision: https://reviews.llvm.org/D153116
Added:
llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
Modified:
llvm/lib/CodeGen/MachineScheduler.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 28b17f76c99e2..ed5dff788b7cb 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -98,9 +98,13 @@ cl::opt<bool> PrintDAGs("misched-print-dags", cl::Hidden,
cl::opt<bool> MISchedDumpReservedCycles(
"misched-dump-reserved-cycles", cl::Hidden, cl::init(false),
cl::desc("Dump resource usage at schedule boundary."));
+cl::opt<bool> MischedDetailResourceBooking(
+ "misched-detail-resource-booking", cl::Hidden, cl::init(false),
+ cl::desc("Show details of invoking getNextResoufceCycle."));
#else
const bool ViewMISchedDAGs = false;
const bool PrintDAGs = false;
+const bool MischedDetailResourceBooking = false;
#ifdef LLVM_ENABLE_DUMP
const bool MISchedDumpReservedCycles = false;
#endif // LLVM_ENABLE_DUMP
@@ -2314,7 +2318,11 @@ unsigned SchedBoundary::getNextResourceCycleByInstance(unsigned InstanceIdx,
std::pair<unsigned, unsigned>
SchedBoundary::getNextResourceCycle(const MCSchedClassDesc *SC, unsigned PIdx,
unsigned Cycles, unsigned StartAtCycle) {
-
+ if (MischedDetailResourceBooking) {
+ LLVM_DEBUG(dbgs() << " Resource booking (@" << CurrCycle << "c): \n");
+ LLVM_DEBUG(dumpReservedCycles());
+ LLVM_DEBUG(dbgs() << " getNextResourceCycle (@" << CurrCycle << "c): \n");
+ }
unsigned MinNextUnreserved = InvalidCycle;
unsigned InstanceIdx = 0;
unsigned StartIndex = ReservedCyclesIndex[PIdx];
@@ -2355,11 +2363,19 @@ SchedBoundary::getNextResourceCycle(const MCSchedClassDesc *SC, unsigned PIdx,
++I) {
unsigned NextUnreserved =
getNextResourceCycleByInstance(I, Cycles, StartAtCycle);
+ if (MischedDetailResourceBooking)
+ LLVM_DEBUG(dbgs() << " Instance " << I - StartIndex << " available @"
+ << NextUnreserved << "c\n");
if (MinNextUnreserved > NextUnreserved) {
InstanceIdx = I;
MinNextUnreserved = NextUnreserved;
}
}
+ if (MischedDetailResourceBooking)
+ LLVM_DEBUG(dbgs() << " selecting " << SchedModel->getResourceName(PIdx)
+ << "[" << InstanceIdx - StartIndex << "]"
+ << " available @" << MinNextUnreserved << "c"
+ << "\n");
return std::make_pair(MinNextUnreserved, InstanceIdx);
}
diff --git a/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
new file mode 100644
index 0000000000000..a012fc5608a3f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
@@ -0,0 +1,1618 @@
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - 2>&1 \
+# RUN: -misched-dump-reserved-cycles=true \
+# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler \
+# RUN: -misched-bottomup=true -sched-print-cycles=true \
+# RUN: -misched-detail-resource-booking=true \
+# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-header-width=21 \
+# RUN: | FileCheck %s
+
+--- |
+ ; ModuleID = '../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll'
+ source_filename = "../llvm-project/llvm/test/CodeGen/AArch64/aarch64-smull.failing.ll"
+ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+ target triple = "aarch64-none-linux-gnu"
+
+ define <8 x i32> @umull_and_v8i32(<8 x i16> %src1, <8 x i32> %src2) #0 {
+ entry:
+ %in1 = zext <8 x i16> %src1 to <8 x i32>
+ %in2 = and <8 x i32> %src2, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
+ %out = mul nsw <8 x i32> %in1, %in2
+ ret <8 x i32> %out
+ }
+
+ attributes #0 = { "target-features"="+neon" }
+
+...
+---
+name: umull_and_v8i32
+alignment: 4
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: fpr128 }
+ - { id: 1, class: fpr128 }
+ - { id: 2, class: fpr128 }
+ - { id: 3, class: fpr128 }
+ - { id: 4, class: fpr64 }
+ - { id: 5, class: fpr64 }
+ - { id: 6, class: fpr128 }
+ - { id: 7, class: fpr128 }
+ - { id: 8, class: fpr128 }
+ - { id: 9, class: fpr64 }
+ - { id: 10, class: fpr128 }
+ - { id: 11, class: fpr64 }
+ - { id: 12, class: fpr128 }
+liveins:
+ - { reg: '$q0', virtual-reg: '%0' }
+ - { reg: '$q1', virtual-reg: '%1' }
+ - { reg: '$q2', virtual-reg: '%2' }
+frameInfo:
+ maxAlignment: 1
+ maxCallFrameSize: 0
+machineFunctionInfo: {}
+body: |
+ bb.0.entry:
+ liveins: $q0, $q1, $q2
+
+ %2:fpr128 = COPY $q2
+ %1:fpr128 = COPY $q1
+ %0:fpr128 = COPY $q0
+ %3:fpr128 = EXTv16i8 %0, %0, 8
+ %6:fpr128 = MOVIv2d_ns 17
+ %7:fpr128 = ANDv16i8 %2, %6
+ %8:fpr128 = ANDv16i8 %1, %6
+ %9:fpr64 = XTNv4i16 %8
+ %10:fpr128 = UMULLv4i16_v4i32 %0.dsub, %9
+ %11:fpr64 = XTNv4i16 %7
+ %12:fpr128 = UMULLv4i16_v4i32 %3.dsub, %11
+ $q0 = COPY %10
+ $q1 = COPY %12
+ RET_ReallyLR implicit $q0, implicit $q1
+
+...
+
+# CHECK-LABEL: Before MISched:
+# CHECK-NEXT: # Machine code for function umull_and_v8i32: IsSSA, NoPHIs, TracksLiveness
+# CHECK-NEXT: Function Live Ins: $q0 in %0, $q1 in %1, $q2 in %2
+# CHECK-EMPTY:
+# CHECK-NEXT: bb.0.entry:
+# CHECK-NEXT: liveins: $q0, $q1, $q2
+# CHECK-NEXT: %2:fpr128 = COPY $q2
+# CHECK-NEXT: %1:fpr128 = COPY $q1
+# CHECK-NEXT: %0:fpr128 = COPY $q0
+# CHECK-NEXT: %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
+# CHECK-NEXT: %6:fpr128 = MOVIv2d_ns 17
+# CHECK-NEXT: %7:fpr128 = ANDv16i8 %2:fpr128, %6:fpr128
+# CHECK-NEXT: %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
+# CHECK-NEXT: %9:fpr64 = XTNv4i16 %8:fpr128
+# CHECK-NEXT: %10:fpr128 = UMULLv4i16_v4i32 %0.dsub:fpr128, %9:fpr64
+# CHECK-NEXT: %11:fpr64 = XTNv4i16 %7:fpr128
+# CHECK-NEXT: %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
+# CHECK-NEXT: $q0 = COPY %10:fpr128
+# CHECK-NEXT: $q1 = COPY %12:fpr128
+# CHECK-NEXT: RET_ReallyLR implicit $q0, implicit $q1
+# CHECK-EMPTY:
+# CHECK-NEXT: # End machine code for function umull_and_v8i32.
+# CHECK-EMPTY:
+# CHECK-NEXT: ********** MI Scheduling **********
+# CHECK-NEXT: umull_and_v8i32:%bb.0 entry
+# CHECK-NEXT: From: %2:fpr128 = COPY $q2
+# CHECK-NEXT: To: RET_ReallyLR implicit $q0, implicit $q1
+# CHECK-NEXT: RegionInstrs: 13
+# CHECK-NEXT: ScheduleDAGMILive::schedule starting
+# CHECK-NEXT: GenericScheduler RegionPolicy: ShouldTrackPressure=0 OnlyTopDown=0 OnlyBottomUp=1
+# CHECK-NEXT: Disabled scoreboard hazard recognizer
+# CHECK-NEXT: Disabled scoreboard hazard recognizer
+# CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 0]: %2:fpr128 = COPY $q2
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 13
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(5): Data Latency=3 Reg=%2
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 0]: %1:fpr128 = COPY $q1
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 2
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 13
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(6): Data Latency=3 Reg=%1
+# CHECK-NEXT: SU(12): Anti Latency=0
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 0]: %0:fpr128 = COPY $q0
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 3
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 14
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(8): Data Latency=3 Reg=%0
+# CHECK-NEXT: SU(3): Data Latency=3 Reg=%0
+# CHECK-NEXT: SU(11): Anti Latency=0
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(3) [TopReadyCycle = 0, BottomReadyCycle = 0]: %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
+# CHECK-NEXT: # preds left : 1
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 4
+# CHECK-NEXT: Depth : 3
+# CHECK-NEXT: Height : 11
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(2): Data Latency=3 Reg=%0
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(10): Data Latency=4 Reg=%3
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(4) [TopReadyCycle = 0, BottomReadyCycle = 0]: %6:fpr128 = MOVIv2d_ns 17
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 2
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 4
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 14
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(6): Data Latency=4 Reg=%6
+# CHECK-NEXT: SU(5): Data Latency=4 Reg=%6
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(5) [TopReadyCycle = 0, BottomReadyCycle = 0]: %7:fpr128 = ANDv16i8 %2:fpr128, %6:fpr128
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 1
+# CHECK-NEXT: Depth : 4
+# CHECK-NEXT: Height : 10
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(4): Data Latency=4 Reg=%6
+# CHECK-NEXT: SU(0): Data Latency=3 Reg=%2
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(9): Data Latency=1 Reg=%7
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(6) [TopReadyCycle = 0, BottomReadyCycle = 0]: %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 1
+# CHECK-NEXT: Depth : 4
+# CHECK-NEXT: Height : 10
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(4): Data Latency=4 Reg=%6
+# CHECK-NEXT: SU(1): Data Latency=3 Reg=%1
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(7): Data Latency=1 Reg=%8
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(7) [TopReadyCycle = 0, BottomReadyCycle = 0]: %9:fpr64 = XTNv4i16 %8:fpr128
+# CHECK-NEXT: # preds left : 1
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 2
+# CHECK-NEXT: Depth : 5
+# CHECK-NEXT: Height : 9
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(6): Data Latency=1 Reg=%8
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(8): Data Latency=2 Reg=%9
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(8) [TopReadyCycle = 0, BottomReadyCycle = 0]: %10:fpr128 = UMULLv4i16_v4i32 %0.dsub:fpr128, %9:fpr64
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 4
+# CHECK-NEXT: Depth : 7
+# CHECK-NEXT: Height : 7
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(7): Data Latency=2 Reg=%9
+# CHECK-NEXT: SU(2): Data Latency=3 Reg=%0
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(11): Data Latency=4 Reg=%10
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(9) [TopReadyCycle = 0, BottomReadyCycle = 0]: %11:fpr64 = XTNv4i16 %7:fpr128
+# CHECK-NEXT: # preds left : 1
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 2
+# CHECK-NEXT: Depth : 5
+# CHECK-NEXT: Height : 9
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(5): Data Latency=1 Reg=%7
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(10): Data Latency=2 Reg=%11
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(10) [TopReadyCycle = 0, BottomReadyCycle = 0]: %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 4
+# CHECK-NEXT: Depth : 7
+# CHECK-NEXT: Height : 7
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(9): Data Latency=2 Reg=%11
+# CHECK-NEXT: SU(3): Data Latency=4 Reg=%3
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: SU(12): Data Latency=4 Reg=%12
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(11) [TopReadyCycle = 0, BottomReadyCycle = 0]: $q0 = COPY %10:fpr128
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 11
+# CHECK-NEXT: Height : 3
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(8): Data Latency=4 Reg=%10
+# CHECK-NEXT: SU(2): Anti Latency=0
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: ExitSU: Ord Latency=3 Artificial
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(12) [TopReadyCycle = 0, BottomReadyCycle = 0]: $q1 = COPY %12:fpr128
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 1
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 11
+# CHECK-NEXT: Height : 3
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(10): Data Latency=4 Reg=%12
+# CHECK-NEXT: SU(1): Anti Latency=0
+# CHECK-NEXT: Successors:
+# CHECK-NEXT: ExitSU: Ord Latency=3 Artificial
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: ExitSU [TopReadyCycle = 0, BottomReadyCycle = 0]: RET_ReallyLR implicit $q0, implicit $q1
+# CHECK-NEXT: # preds left : 2
+# CHECK-NEXT: # succs left : 0
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 0
+# CHECK-NEXT: Depth : 14
+# CHECK-NEXT: Height : 0
+# CHECK-NEXT: Predecessors:
+# CHECK-NEXT: SU(12): Ord Latency=3 Artificial
+# CHECK-NEXT: SU(11): Ord Latency=3 Artificial
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: Critical Path(GS-RR ): 14
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Cycle: 3 BotQ.A
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 12 11
+# CHECK-NEXT: Cand SU(12) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(12) $q1 = COPY %12:fpr128
+# CHECK-NEXT: Ready @3c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: BotQ.A TopLatency SU(12) 11c
+# CHECK-NEXT: BotQ.A BotLatency SU(12) 3c
+# CHECK-NEXT: BotQ.A @3c
+# CHECK-NEXT: Retired: 1
+# CHECK-NEXT: Executed: 3c
+# CHECK-NEXT: Critical: 0c, 1 MOps
+# CHECK-NEXT: ExpectedLatency: 3c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @4c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Queue BotQ.P: 10
+# CHECK-NEXT: Queue BotQ.A: 11
+# CHECK-NEXT: Scheduling SU(11) $q0 = COPY %10:fpr128
+# CHECK-NEXT: Ready @3c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @4c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Resource booking (@3c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@3c):
+# CHECK-NEXT: Instance 0 available @3c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: *** Max MOps 2 at cycle 3
+# CHECK-NEXT: Cycle: 4 BotQ.A
+# CHECK-NEXT: BotQ.A @4c
+# CHECK-NEXT: Retired: 2
+# CHECK-NEXT: Executed: 4c
+# CHECK-NEXT: Critical: 1c, 2 MOps
+# CHECK-NEXT: ExpectedLatency: 3c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Cycle: 7 BotQ.A
+# CHECK-NEXT: Resource booking (@7c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@7c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: Resource booking (@7c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@7c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 10 8
+# CHECK-NEXT: Cand SU(10) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(10) %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
+# CHECK-NEXT: Ready @7c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: Resource booking (@7c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@7c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: Resource booking (@7c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@7c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: BotQ.A BotLatency SU(10) 7c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 8 BotQ.A
+# CHECK-NEXT: BotQ.A @8c
+# CHECK-NEXT: Retired: 3
+# CHECK-NEXT: Executed: 8c
+# CHECK-NEXT: Critical: 1c, 3 MOps
+# CHECK-NEXT: ExpectedLatency: 7c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@8c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@8c):
+# CHECK-NEXT: Instance 0 available @9c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @0c
+# CHECK-NEXT: Queue BotQ.P: 9 3
+# CHECK-NEXT: Queue BotQ.A: 8
+# CHECK-NEXT: Scheduling SU(8) %10:fpr128 = UMULLv4i16_v4i32 %0.dsub:fpr128, %9:fpr64
+# CHECK-NEXT: Ready @8c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: Resource booking (@8c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@8c):
+# CHECK-NEXT: Instance 0 available @9c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @0c
+# CHECK-NEXT: Resource booking (@8c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@8c):
+# CHECK-NEXT: Instance 0 available @7c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @0c
+# CHECK-NEXT: BotQ.A TopLatency SU(8) 7c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 9 BotQ.A
+# CHECK-NEXT: BotQ.A @9c
+# CHECK-NEXT: Retired: 4
+# CHECK-NEXT: Executed: 9c
+# CHECK-NEXT: Critical: 2c, 4 MOps
+# CHECK-NEXT: ExpectedLatency: 7c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@9c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@9c):
+# CHECK-NEXT: Instance 0 available @8c
+# CHECK-NEXT: Instance 1 available @9c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @8c
+# CHECK-NEXT: Resource booking (@9c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@9c):
+# CHECK-NEXT: Instance 0 available @8c
+# CHECK-NEXT: Instance 1 available @9c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @8c
+# CHECK-NEXT: Queue BotQ.P: 7 3
+# CHECK-NEXT: Queue BotQ.A: 9
+# CHECK-NEXT: Scheduling SU(9) %11:fpr64 = XTNv4i16 %7:fpr128
+# CHECK-NEXT: Ready @9c
+# CHECK-NEXT: CortexA55UnitFPALU +1x1u
+# CHECK-NEXT: Resource booking (@9c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@9c):
+# CHECK-NEXT: Instance 0 available @8c
+# CHECK-NEXT: Instance 1 available @9c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @8c
+# CHECK-NEXT: Resource booking (@9c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 7
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@9c):
+# CHECK-NEXT: Instance 0 available @7c
+# CHECK-NEXT: Instance 1 available @8c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @7c
+# CHECK-NEXT: BotQ.A BotLatency SU(9) 9c
+# CHECK-NEXT: BotQ.A @9c
+# CHECK-NEXT: Retired: 5
+# CHECK-NEXT: Executed: 9c
+# CHECK-NEXT: Critical: 2c, 5 MOps
+# CHECK-NEXT: ExpectedLatency: 9c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Cycle: 10 BotQ.A
+# CHECK-NEXT: Resource booking (@10c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@10c):
+# CHECK-NEXT: Instance 0 available @10c
+# CHECK-NEXT: Instance 1 available @9c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @9c
+# CHECK-NEXT: Resource booking (@10c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@10c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @10c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @10c
+# CHECK-NEXT: Queue BotQ.P: 3
+# CHECK-NEXT: Queue BotQ.A: 7 5
+# CHECK-NEXT: Cand SU(7) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(7) %9:fpr64 = XTNv4i16 %8:fpr128
+# CHECK-NEXT: Ready @10c
+# CHECK-NEXT: CortexA55UnitFPALU +1x1u
+# CHECK-NEXT: Resource booking (@10c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@10c):
+# CHECK-NEXT: Instance 0 available @10c
+# CHECK-NEXT: Instance 1 available @9c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @9c
+# CHECK-NEXT: Resource booking (@10c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 8
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@10c):
+# CHECK-NEXT: Instance 0 available @9c
+# CHECK-NEXT: Instance 1 available @8c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @8c
+# CHECK-NEXT: BotQ.A @10c
+# CHECK-NEXT: Retired: 6
+# CHECK-NEXT: Executed: 10c
+# CHECK-NEXT: Critical: 3c, 6 MOps
+# CHECK-NEXT: ExpectedLatency: 9c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@10c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@10c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: SU(5) CortexA55UnitFPALU[0]=11c
+# CHECK-NEXT: Cycle: 11 BotQ.A
+# CHECK-NEXT: Resource booking (@11c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@11c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: Resource booking (@11c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@11c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: Resource booking (@11c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@11c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 3 5 6
+# CHECK-NEXT: Cand SU(3) ORDER
+# CHECK-NEXT: Cand SU(5) ORDER
+# CHECK-NEXT: Cand SU(6) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(6) %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
+# CHECK-NEXT: Ready @11c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: *** Critical resource CortexA55UnitFPALU: 4c
+# CHECK-NEXT: Resource booking (@11c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@11c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: Resource booking (@11c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 9
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@11c):
+# CHECK-NEXT: Instance 0 available @9c
+# CHECK-NEXT: Instance 1 available @10c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @9c
+# CHECK-NEXT: BotQ.A BotLatency SU(6) 10c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 12 BotQ.A
+# CHECK-NEXT: BotQ.A @12c
+# CHECK-NEXT: Retired: 7
+# CHECK-NEXT: Executed: 12c
+# CHECK-NEXT: Critical: 4c, 8 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 10c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@12c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@12c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @12c
+# CHECK-NEXT: Resource booking (@12c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@12c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @12c
+# CHECK-NEXT: Queue BotQ.P: 1
+# CHECK-NEXT: Queue BotQ.A: 3 5
+# CHECK-NEXT: Cand SU(3) ORDER
+# CHECK-NEXT: Cand SU(5) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(5) %7:fpr128 = ANDv16i8 %2:fpr128, %6:fpr128
+# CHECK-NEXT: Ready @12c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: Resource booking (@12c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@12c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @12c
+# CHECK-NEXT: Resource booking (@12c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 10
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@12c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @10c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @10c
+# CHECK-NEXT: BotQ.A TopLatency SU(5) 4c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 13 BotQ.A
+# CHECK-NEXT: BotQ.A @13c
+# CHECK-NEXT: Retired: 8
+# CHECK-NEXT: Executed: 13c
+# CHECK-NEXT: Critical: 5c, 10 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 10c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@13c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@13c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @14c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @13c
+# CHECK-NEXT: Queue BotQ.P: 1 4 0
+# CHECK-NEXT: Queue BotQ.A: 3
+# CHECK-NEXT: Scheduling SU(3) %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
+# CHECK-NEXT: Ready @13c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: Resource booking (@13c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@13c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @14c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @13c
+# CHECK-NEXT: Resource booking (@13c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 11
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@13c):
+# CHECK-NEXT: Instance 0 available @11c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @11c
+# CHECK-NEXT: BotQ.A BotLatency SU(3) 11c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 14 BotQ.A
+# CHECK-NEXT: BotQ.A @14c
+# CHECK-NEXT: Retired: 9
+# CHECK-NEXT: Executed: 14c
+# CHECK-NEXT: Critical: 6c, 12 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 11c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@14c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@14c):
+# CHECK-NEXT: Instance 0 available @4c
+# CHECK-NEXT: Instance 1 available @4c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @4c
+# CHECK-NEXT: Resource booking (@14c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@14c):
+# CHECK-NEXT: Instance 0 available @4c
+# CHECK-NEXT: Instance 1 available @4c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @4c
+# CHECK-NEXT: Queue BotQ.P: 2 4 0
+# CHECK-NEXT: Queue BotQ.A: 1
+# CHECK-NEXT: Scheduling SU(1) %1:fpr128 = COPY $q1
+# CHECK-NEXT: Ready @14c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@14c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@14c):
+# CHECK-NEXT: Instance 0 available @4c
+# CHECK-NEXT: Instance 1 available @4c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @4c
+# CHECK-NEXT: Resource booking (@14c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 3
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@14c):
+# CHECK-NEXT: Instance 0 available @3c
+# CHECK-NEXT: Instance 1 available @3c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @3c
+# CHECK-NEXT: BotQ.A BotLatency SU(1) 13c
+# CHECK-NEXT: BotQ.A @14c
+# CHECK-NEXT: Retired: 10
+# CHECK-NEXT: Executed: 14c
+# CHECK-NEXT: Critical: 6c, 12 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 13c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Cycle: 15 BotQ.A
+# CHECK-NEXT: Resource booking (@15c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@15c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @4c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @4c
+# CHECK-NEXT: Queue BotQ.P: 2 4
+# CHECK-NEXT: Queue BotQ.A: 0
+# CHECK-NEXT: Scheduling SU(0) %2:fpr128 = COPY $q2
+# CHECK-NEXT: Ready @15c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@15c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@15c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @4c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @4c
+# CHECK-NEXT: Resource booking (@15c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 3
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@15c):
+# CHECK-NEXT: Instance 0 available @14c
+# CHECK-NEXT: Instance 1 available @3c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @3c
+# CHECK-NEXT: BotQ.A @15c
+# CHECK-NEXT: Retired: 11
+# CHECK-NEXT: Executed: 15c
+# CHECK-NEXT: Critical: 6c, 12 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 13c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Cycle: 16 BotQ.A
+# CHECK-NEXT: Resource booking (@16c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@16c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @16c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @15c
+# CHECK-NEXT: Resource booking (@16c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@16c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @14c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @14c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 2 4
+# CHECK-NEXT: Cand SU(2) ORDER
+# CHECK-NEXT: Cand SU(4) PHYS-REG
+# CHECK-NEXT: Pick Bot PHYS-REG
+# CHECK-NEXT: Scheduling SU(4) %6:fpr128 = MOVIv2d_ns 17
+# CHECK-NEXT: Ready @16c
+# CHECK-NEXT: CortexA55UnitFPALU +2x1u
+# CHECK-NEXT: Resource booking (@16c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@16c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @14c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @14c
+# CHECK-NEXT: Resource booking (@16c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 12
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@16c):
+# CHECK-NEXT: Instance 0 available @13c
+# CHECK-NEXT: Instance 1 available @12c
+# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @12c
+# CHECK-NEXT: BotQ.A BotLatency SU(4) 14c
+# CHECK-NEXT: Bump cycle to begin group
+# CHECK-NEXT: Cycle: 17 BotQ.A
+# CHECK-NEXT: BotQ.A @17c
+# CHECK-NEXT: Retired: 12
+# CHECK-NEXT: Executed: 17c
+# CHECK-NEXT: Critical: 7c, 14 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 14c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 16
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@17c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 16
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@17c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @16c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @15c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 2
+# CHECK-NEXT: Scheduling SU(2) %0:fpr128 = COPY $q0
+# CHECK-NEXT: Ready @17c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@17c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 16
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@17c):
+# CHECK-NEXT: Instance 0 available @15c
+# CHECK-NEXT: Instance 1 available @16c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @15c
+# CHECK-NEXT: Resource booking (@17c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 14
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 16
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@17c):
+# CHECK-NEXT: Instance 0 available @14c
+# CHECK-NEXT: Instance 1 available @15c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @14c
+# CHECK-NEXT: BotQ.A @17c
+# CHECK-NEXT: Retired: 13
+# CHECK-NEXT: Executed: 17c
+# CHECK-NEXT: Critical: 7c, 14 CortexA55UnitFPALU
+# CHECK-NEXT: ExpectedLatency: 14c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 17
+# CHECK-NEXT: CortexA55UnitALU(1) = 15
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 13
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 16
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: *** Final schedule for %bb.0 ***
+# CHECK-NEXT: * Schedule table (BottomUp):
+# CHECK-NEXT: i: issue
+# CHECK-NEXT: x: resource booked
+# CHECK-NEXT: Cycle | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 |
+# CHECK-NEXT: SU(2) | i | | | | | | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitALU | x | | | | | | | | | | | | | | |
+# CHECK-NEXT: SU(4) | | i | | | | | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | x | x | | | | | | | | | | | | |
+# CHECK-NEXT: SU(0) | | | i | | | | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitALU | | | x | | | | | | | | | | | | |
+# CHECK-NEXT: SU(1) | | | | i | | | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitALU | | | | x | | | | | | | | | | | |
+# CHECK-NEXT: SU(3) | | | | | i | | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | x | x | | | | | | | | | |
+# CHECK-NEXT: SU(5) | | | | | | i | | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | x | x | | | | | | | | |
+# CHECK-NEXT: SU(6) | | | | | | | i | | | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | | x | x | | | | | | | |
+# CHECK-NEXT: SU(7) | | | | | | | | i | | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | | | x | | | | | | | |
+# CHECK-NEXT: SU(9) | | | | | | | | | i | | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | | | | x | | | | | | |
+# CHECK-NEXT: SU(8) | | | | | | | | | | i | | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | | | | | x | x | | | | |
+# CHECK-NEXT: SU(10) | | | | | | | | | | | i | | | | |
+# CHECK-NEXT: CortexA55UnitFPALU | | | | | | | | | | | x | x | | | |
+# CHECK-NEXT: SU(11) | | | | | | | | | | | | | | | i |
+# CHECK-NEXT: CortexA55UnitALU | | | | | | | | | | | | | | | x |
+# CHECK-NEXT: SU(12) | | | | | | | | | | | | | | | i |
+# CHECK-NEXT: CortexA55UnitALU | | | | | | | | | | | | | | | x |
+# CHECK-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 17]: %0:fpr128 = COPY $q0
+# CHECK-NEXT: SU(4) [TopReadyCycle = 0, BottomReadyCycle = 16]: %6:fpr128 = MOVIv2d_ns 17
+# CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 15]: %2:fpr128 = COPY $q2
+# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 14]: %1:fpr128 = COPY $q1
+# CHECK-NEXT: SU(3) [TopReadyCycle = 0, BottomReadyCycle = 13]: %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
+# CHECK-NEXT: SU(5) [TopReadyCycle = 0, BottomReadyCycle = 12]: %7:fpr128 = ANDv16i8 %2:fpr128, %6:fpr128
+# CHECK-NEXT: SU(6) [TopReadyCycle = 0, BottomReadyCycle = 11]: %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
+# CHECK-NEXT: SU(7) [TopReadyCycle = 0, BottomReadyCycle = 10]: %9:fpr64 = XTNv4i16 %8:fpr128
+# CHECK-NEXT: SU(9) [TopReadyCycle = 0, BottomReadyCycle = 9]: %11:fpr64 = XTNv4i16 %7:fpr128
+# CHECK-NEXT: SU(8) [TopReadyCycle = 0, BottomReadyCycle = 8]: %10:fpr128 = UMULLv4i16_v4i32 %0.dsub:fpr128, %9:fpr64
+# CHECK-NEXT: SU(10) [TopReadyCycle = 0, BottomReadyCycle = 7]: %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
+# CHECK-NEXT: SU(11) [TopReadyCycle = 0, BottomReadyCycle = 3]: $q0 = COPY %10:fpr128
+# CHECK-NEXT: SU(12) [TopReadyCycle = 0, BottomReadyCycle = 3]: $q1 = COPY %12:fpr128
+# CHECK-EMPTY:
+# CHECK-NEXT: ********** INTERVALS **********
+# CHECK-NEXT: B0 [0B,48r:0)[192r,224r:1) 0 at 0B-phi 1 at 192r
+# CHECK-NEXT: B1 [0B,96r:0)[208r,224r:1) 0 at 0B-phi 1 at 208r
+# CHECK-NEXT: B2 [0B,88r:0) 0 at 0B-phi
+# CHECK-NEXT: %0 [48r,168r:0) 0 at 48r weight:0.000000e+00
+# CHECK-NEXT: %1 [96r,120r:0) 0 at 96r weight:0.000000e+00
+# CHECK-NEXT: %2 [88r,112r:0) 0 at 88r weight:0.000000e+00
+# CHECK-NEXT: %3 [104r,176r:0) 0 at 104r weight:0.000000e+00
+# CHECK-NEXT: %6 [80r,120r:0) 0 at 80r weight:0.000000e+00
+# CHECK-NEXT: %7 [112r,160r:0) 0 at 112r weight:0.000000e+00
+# CHECK-NEXT: %8 [120r,128r:0) 0 at 120r weight:0.000000e+00
+# CHECK-NEXT: %9 [128r,168r:0) 0 at 128r weight:0.000000e+00
+# CHECK-NEXT: %10 [168r,192r:0) 0 at 168r weight:0.000000e+00
+# CHECK-NEXT: %11 [160r,176r:0) 0 at 160r weight:0.000000e+00
+# CHECK-NEXT: %12 [176r,208r:0) 0 at 176r weight:0.000000e+00
+# CHECK-NEXT: RegMasks:
+# CHECK-NEXT: ********** MACHINEINSTRS **********
+# CHECK-NEXT: # Machine code for function umull_and_v8i32: IsSSA, NoPHIs, TracksLiveness
+# CHECK-NEXT: Function Live Ins: $q0 in %0, $q1 in %1, $q2 in %2
+# CHECK-EMPTY:
+# CHECK-NEXT: 0B bb.0.entry:
+# CHECK-NEXT: liveins: $q0, $q1, $q2
+# CHECK-NEXT: 48B %0:fpr128 = COPY $q0
+# CHECK-NEXT: 80B %6:fpr128 = MOVIv2d_ns 17
+# CHECK-NEXT: 88B %2:fpr128 = COPY $q2
+# CHECK-NEXT: 96B %1:fpr128 = COPY $q1
+# CHECK-NEXT: 104B %3:fpr128 = EXTv16i8 %0:fpr128, %0:fpr128, 8
+# CHECK-NEXT: 112B %7:fpr128 = ANDv16i8 %2:fpr128, %6:fpr128
+# CHECK-NEXT: 120B %8:fpr128 = ANDv16i8 %1:fpr128, %6:fpr128
+# CHECK-NEXT: 128B %9:fpr64 = XTNv4i16 %8:fpr128
+# CHECK-NEXT: 160B %11:fpr64 = XTNv4i16 %7:fpr128
+# CHECK-NEXT: 168B %10:fpr128 = UMULLv4i16_v4i32 %0.dsub:fpr128, %9:fpr64
+# CHECK-NEXT: 176B %12:fpr128 = UMULLv4i16_v4i32 %3.dsub:fpr128, %11:fpr64
+# CHECK-NEXT: 192B $q0 = COPY %10:fpr128
+# CHECK-NEXT: 208B $q1 = COPY %12:fpr128
+# CHECK-NEXT: 224B RET_ReallyLR implicit $q0, implicit $q1
+# CHECK-EMPTY:
+# CHECK-NEXT: # End machine code for function umull_and_v8i32.
diff --git a/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
new file mode 100644
index 0000000000000..0f5dc000c50b1
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir
@@ -0,0 +1,479 @@
+# RUN: llc -mtriple=aarch64-none-linux-gnu -mcpu=cortex-a55 \
+# RUN: -run-pass=machine-scheduler -debug-only=machine-scheduler -o - %s \
+# RUN: -misched-bottomup=true -sched-print-cycles=true \
+# RUN: -misched-dump-reserved-cycles=true -misched-detail-resource-booking=true\
+# RUN: -misched-dump-schedule-trace=true -misched-dump-schedule-trace-col-width=4 \
+# RUN: 2>&1 | FileCheck %s
+
+# REQUIRES: asserts, aarch64-registered-target
+---
+name: f
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0, $x1, $x2
+ $x3 = ADDXrr $x0, $x0
+ $x4 = ADDXrr $x1, $x1
+ $x5 = ADDXrr $x2, $x2
+
+# CHECK-LABEL: Before MISched:
+# CHECK-NEXT: # Machine code for function f: IsSSA, NoPHIs, TracksLiveness, NoVRegs
+# CHECK-EMPTY:
+# CHECK-NEXT: bb.0:
+# CHECK-NEXT: liveins: $x0, $x1, $x2
+# CHECK-NEXT: $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: $x5 = ADDXrr $x2, $x2
+# CHECK-EMPTY:
+# CHECK-NEXT: # End machine code for function f.
+# CHECK-EMPTY:
+# CHECK-NEXT: ********** MI Scheduling **********
+# CHECK-NEXT: f:%bb.0
+# CHECK-NEXT: From: $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: To: End
+# CHECK-NEXT: RegionInstrs: 3
+# CHECK-NEXT: ScheduleDAGMILive::schedule starting
+# CHECK-NEXT: GenericScheduler RegionPolicy: ShouldTrackPressure=0 OnlyTopDown=0 OnlyBottomUp=1
+# CHECK-NEXT: Disabled scoreboard hazard recognizer
+# CHECK-NEXT: Disabled scoreboard hazard recognizer
+# CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 0
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 0
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 0
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 0
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x5 = ADDXrr $x2, $x2
+# CHECK-NEXT: # preds left : 0
+# CHECK-NEXT: # succs left : 0
+# CHECK-NEXT: # rdefs left : 0
+# CHECK-NEXT: Latency : 3
+# CHECK-NEXT: Depth : 0
+# CHECK-NEXT: Height : 0
+# CHECK-NEXT: Single Issue : false;
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Critical Path(GS-RR ): 0
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 2 1 0
+# CHECK-NEXT: Cand SU(2) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(2) $x5 = ADDXrr $x2, $x2
+# CHECK-NEXT: Ready @0c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: BotQ.A @0c
+# CHECK-NEXT: Retired: 1
+# CHECK-NEXT: Executed: 0c
+# CHECK-NEXT: Critical: 0c, 1 MOps
+# CHECK-NEXT: ExpectedLatency: 0c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @1c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @1c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 0 1
+# CHECK-NEXT: Cand SU(0) ORDER
+# CHECK-NEXT: Cand SU(1) ORDER
+# CHECK-NEXT: Pick Bot ORDER
+# CHECK-NEXT: Scheduling SU(1) $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: Ready @0c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @1c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Resource booking (@0c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@0c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: *** Max MOps 2 at cycle 0
+# CHECK-NEXT: Cycle: 1 BotQ.A
+# CHECK-NEXT: BotQ.A @1c
+# CHECK-NEXT: Retired: 2
+# CHECK-NEXT: Executed: 1c
+# CHECK-NEXT: Critical: 1c, 2 MOps
+# CHECK-NEXT: ExpectedLatency: 0c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Resource booking (@1c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@1c):
+# CHECK-NEXT: Instance 0 available @1c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Queue BotQ.P:
+# CHECK-NEXT: Queue BotQ.A: 0
+# CHECK-NEXT: Scheduling SU(0) $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: Ready @1c
+# CHECK-NEXT: CortexA55UnitALU +1x1u
+# CHECK-NEXT: Resource booking (@1c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@1c):
+# CHECK-NEXT: Instance 0 available @1c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[1] available @0c
+# CHECK-NEXT: Resource booking (@1c):
+# CHECK-NEXT: CortexA55UnitALU(0) = 0
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: getNextResourceCycle (@1c):
+# CHECK-NEXT: Instance 0 available @0c
+# CHECK-NEXT: Instance 1 available @0c
+# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: BotQ.A @1c
+# CHECK-NEXT: Retired: 3
+# CHECK-NEXT: Executed: 1c
+# CHECK-NEXT: Critical: 1c, 3 MOps
+# CHECK-NEXT: ExpectedLatency: 0c
+# CHECK-NEXT: - Latency limited.
+# CHECK-NEXT: CortexA55UnitALU(0) = 1
+# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitB(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitDiv(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPALU(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPDIV(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitFPMAC(1) = 4294967295
+# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
+# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: *** Final schedule for %bb.0 ***
+# CHECK-NEXT: * Schedule table (BottomUp):
+# CHECK-NEXT: i: issue
+# CHECK-NEXT: x: resource booked
+# CHECK-NEXT: Cycle | 1 | 0 |
+# CHECK-NEXT: SU(0) | i | |
+# CHECK-NEXT: CortexA55UnitALU | x | |
+# CHECK-NEXT: SU(1) | | i |
+# CHECK-NEXT: CortexA55UnitALU | | x |
+# CHECK-NEXT: SU(2) | | i |
+# CHECK-NEXT: CortexA55UnitALU | | x |
+# CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 1]: $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: SU(2) [TopReadyCycle = 0, BottomReadyCycle = 0]: $x5 = ADDXrr $x2, $x2
+# CHECK-EMPTY:
+# CHECK-NEXT: ********** INTERVALS **********
+# CHECK-NEXT: W0 [0B,16r:0) 0 at 0B-phi
+# CHECK-NEXT: W1 [0B,32r:0) 0 at 0B-phi
+# CHECK-NEXT: W2 [0B,48r:0) 0 at 0B-phi
+# CHECK-NEXT: RegMasks:
+# CHECK-NEXT: ********** MACHINEINSTRS **********
+# CHECK-NEXT: # Machine code for function f: IsSSA, NoPHIs, TracksLiveness, NoVRegs
+# CHECK-EMPTY:
+# CHECK-NEXT: 0B bb.0:
+# CHECK-NEXT: liveins: $x0, $x1, $x2
+# CHECK-NEXT: 16B $x3 = ADDXrr $x0, $x0
+# CHECK-NEXT: 32B $x4 = ADDXrr $x1, $x1
+# CHECK-NEXT: 48B $x5 = ADDXrr $x2, $x2
+# CHECK-EMPTY:
+# CHECK-NEXT: # End machine code for function f.
\ No newline at end of file
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