[PATCH] D153234: [RISCV] Add codegen for Zfbfmin instructions

[Jun Sha via Phabricator via llvm-commits]

joshua-arch1 updated this revision to Diff 532776.
joshua-arch1 added a comment.

Rebase, as well as change the operand type in riscv_fpround_bf16/riscv_fpextend_bf16 from f16 to bf16.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153234/new/

https://reviews.llvm.org/D153234

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
  llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/test/CodeGen/RISCV/zfbfmin.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D153234.532776.patch
Type: text/x-patch
Size: 14755 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230620/9100440a/attachment.bin>