[PATCH] D151696: [x86] Remove CPU_SPECIFIC* MACROs and add getManglingForCPU
Freddy, Ye via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 19 18:03:19 PDT 2023
FreddyYe added inline comments.
================
Comment at: llvm/lib/TargetParser/X86TargetParser.cpp:110
FeatureBitset Features;
+ char Mangling;
+ bool OnlyForCPUDispatchSpecific;
----------------
RKSimon wrote:
> Do we have a documented list of the mangling values anywhere? The values below look too much like magic numbers tbh.
I think not. I copied them from the old MACROs in X86TargetParser.def. I think the values are just used to do some distinguish from different CPUs. And 'a'-'Z' is about to run out of soon here. We probably need to extend the mangling, may be with another letter as prefix. @erichkeane may have a better answer here.
================
Comment at: llvm/test/CodeGen/X86/cpus-intel.ll:90
; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom_sse4_2_movbe 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
----------------
RKSimon wrote:
> put this with the goldmonth checks?
I'll do the adjust. BTW I'd like also to mention below:
Here are the rules I used to add features/tuning model in X86.td for missing cpu names in CPU_SPECIFIC Macros:
RULE 1: Infer from the name itself. E.g. pentium_4 -> pentium4, pentium_iii -> pentium3
RULE 2: CPU_SPECIFIC_ALIAS can tell me its old name. Using the old name to continue to infer.
RULE 3: Use the feature list in CPU_SPECIFIC to compare and append with existing CPU names:
```
pentium_4_sse3 -> prescott
core_2_duo_ssse3 -> core2
core_2_duo_sse4_1 -> penryn
atom_sse4_2 -> silvermont
core_i7_sse4_2 -> nehalem
core_aes_pclmulqdq -> westmere
core_5th_gen_avx_tsx -> broadwell
```
There is only one exception: atom_sse4_2_movbe. For now I set it as goldmont features and silvermont tuning model according to its definition:
```
CPU_SPECIFIC("atom_sse4_2_movbe", "silvermont", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt")
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151696/new/
https://reviews.llvm.org/D151696
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