[PATCH] D143759: [AMDGPU] Implement whole wave register spill
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 19 06:55:05 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:651
+ assert(Reg.isVirtual());
+ if (VRegFlags.inBounds(Reg))
+ VRegFlags[Reg] |= (uint8_t)1 << Flag;
----------------
cdevadas wrote:
> arsenm wrote:
> > Why are the inbounds checks needed? The analagous MRI functions do not tolerate invalid register values
> VRegFlags will be grown each time (if the size exceeds the initial size set) when a new virtual register is created/cloned. The MRI's 'VRegToType' has a similar bound check.
VRegToType isn't really analagous. Untyped and typed registers can coexist, I'd expect it to be unnecessary here
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https://reviews.llvm.org/D143759/new/
https://reviews.llvm.org/D143759
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