[PATCH] D152649: [AMDGPU] Enable Atomic Optimizer and Default to Iterative Scan Strategy.

[Jon Chesterfield via Phabricator via llvm-commits]

JonChesterfield added a comment.

>From the pass,

/// This pass optimizes atomic operations by using a single lane of a wavefront
/// to perform the atomic operation, thus reducing contention on that memory
/// location.

Could someone expand on this? The pass seems to take an atomic operation that lowers to a single instruction and replace it with a loop over active lanes, each of which calls that same instruction. How/when is that better?


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