[PATCH] D153002: [X86][AMX] set Stride to Tile's Col when doing combine amxcast and store into tilestore

[LuoYuanke via Phabricator via llvm-commits]

LuoYuanke added inline comments.


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Comment at: llvm/test/CodeGen/X86/AMX/amx-combine.ll:145
+  %tile = call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 32, i8* %src_ptr, i64 64)
+  %vec = call <256 x i8> @llvm.x86.cast.tile.to.vector.v256i8(x86_amx %tile)
+  store <256 x i8> %vec, <256 x i8>* %dst_ptr, align 256
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Could you add comments in the amx-cast definition that the vector size can be smaller than AMX register size (1024 bytes)? I think vector size can NOT be larger than AMX register size, am I right?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153002/new/

https://reviews.llvm.org/D153002