[PATCH] D152663: [asan] Fix shadow load alignment for unaligned 128-bit load/store

[Fangrui Song via Phabricator via llvm-commits]

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When a 128-bit load/store is aligned by 8, we incorrectly emit `load i16, ptr ..., align 2`
while the shadow byte address may be odd.

This manifests as possibly-misaligned shadow load with `-mstrict-align`, e.g. `clang -target=aarch64-linux -O2 -mstrict-align -fsanitize=address`

Fix https://github.com/llvm/llvm-project/issues/63258


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152663

Files:
  llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
  llvm/test/Instrumentation/AddressSanitizer/basic.ll
  llvm/test/Instrumentation/AddressSanitizer/vector-load-store.ll

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