[PATCH] D152614: [AMDGPU] Fix VGPR VOPD banks for src2

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s:281
 
-v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmamk_f32      v5, v2, 0xaf123456, v5
 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src2 operands must use different VGPR banks
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But then even a manually written tests do not save against a simple miscalculation. These registers are only 2 steps apart. There are 4 banks. One must add 4 to get a bank conflict. 3+4=7, not 5. How was this test done?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152614/new/

https://reviews.llvm.org/D152614