[llvm] dcda3e6 - [RISCV] Cleanup vmv.v.x isel patterns to look more like other patterns. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-06-09T09:59:27-07:00
New Revision: dcda3e67e729ab8f2566563bd26f6ec018ce21d7

URL: https://github.com/llvm/llvm-project/commit/dcda3e67e729ab8f2566563bd26f6ec018ce21d7
DIFF: https://github.com/llvm/llvm-project/commit/dcda3e67e729ab8f2566563bd26f6ec018ce21d7.diff

LOG: [RISCV] Cleanup vmv.v.x isel patterns to look more like other patterns. NFC

Add register classes to output registers. Use simm5 instead of XLenVT
for output immediate.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
index 5dea903a24af4..86c9a53deb524 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
@@ -1776,21 +1776,21 @@ foreach vti = AllIntegerVectors in {
   let Predicates = GetVTypePredicates<vti>.Predicates in {
     def : Pat<(vti.Vector (riscv_vmv_v_x_vl (vti.Vector undef), GPR:$rs2, VLOpFrag)),
               (!cast<Instruction>("PseudoVMV_V_X_"#vti.LMul.MX)
-               $rs2, GPR:$vl, vti.Log2SEW)>;
-    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.Vector:$passthru, GPR:$rs2, VLOpFrag)),
+               GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
+    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, GPR:$rs2, VLOpFrag)),
               (!cast<Instruction>("PseudoVMV_V_X_"#vti.LMul.MX#"_TU")
-               $passthru, $rs2, GPR:$vl, vti.Log2SEW)>;
+               vti.RegClass:$passthru, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
     defvar ImmPat = !cast<ComplexPattern>("sew"#vti.SEW#"simm5");
-    def : Pat<(vti.Vector (riscv_vmv_v_x_vl (vti.Vector undef), (ImmPat XLenVT:$imm5),
+    def : Pat<(vti.Vector (riscv_vmv_v_x_vl (vti.Vector undef), (ImmPat simm5:$imm5),
                                             VLOpFrag)),
               (!cast<Instruction>("PseudoVMV_V_I_"#vti.LMul.MX)
-               XLenVT:$imm5, GPR:$vl, vti.Log2SEW)>;
-    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.Vector:$passthru, (ImmPat XLenVT:$imm5),
+               simm5:$imm5, GPR:$vl, vti.Log2SEW)>;
+    def : Pat<(vti.Vector (riscv_vmv_v_x_vl vti.RegClass:$passthru, (ImmPat simm5:$imm5),
                                                 VLOpFrag)),
               (!cast<Instruction>("PseudoVMV_V_I_"#vti.LMul.MX#"_TU")
-               $passthru, XLenVT:$imm5, GPR:$vl, vti.Log2SEW)>;
+               vti.RegClass:$passthru, simm5:$imm5, GPR:$vl, vti.Log2SEW)>;
   }
-}  
+}
 
 // 12. Vector Fixed-Point Arithmetic Instructions