[llvm] 90431ca - Reland [AMDGPU] New PAL metadata updates to ps_extra_lds_size and float_mode

[David Stuttard via llvm-commits]

Author: David Stuttard
Date: 2023-06-09T12:34:00+01:00
New Revision: 90431ca2e01489eeff22e141714bb294315d6a3c

URL: https://github.com/llvm/llvm-project/commit/90431ca2e01489eeff22e141714bb294315d6a3c
DIFF: https://github.com/llvm/llvm-project/commit/90431ca2e01489eeff22e141714bb294315d6a3c.diff

LOG: Reland [AMDGPU] New PAL metadata updates to ps_extra_lds_size and float_mode

New metadata format contains full calculation of field contents for
ps_extra_lds_size (vs old format where the value in RSRC register is used by PAL
to calculate the value required).

Also stop updating float_mode and rely on front end settings for this field.

Differential Revision: https://reviews.llvm.org/D152247

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index fb3ce11a495e7..653f3172c0ac1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -1045,10 +1045,6 @@ void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF,
         MD->setRsrc2(CC, S_00B84C_SCRATCH_EN(1));
     }
   } else {
-    // Priority?
-    MD->setHwStage(CC, ".float_mode", CurrentProgramInfo.FloatMode);
-    // Priv?
-    // DX10Clamp?
     MD->setHwStage(CC, ".debug_mode", (bool)CurrentProgramInfo.DebugMode);
     MD->setHwStage(CC, ".ieee_mode", (bool)CurrentProgramInfo.IEEEMode);
     MD->setHwStage(CC, ".wgp_mode", (bool)CurrentProgramInfo.WgpMode);
@@ -1082,7 +1078,12 @@ void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF,
       MD->setSpiPsInputAddr(MFI->getPSInputAddr());
     } else {
       // Graphics registers
-      MD->setGraphicsRegisters(".ps_extra_lds_size", ExtraLDSSize);
+      const unsigned ExtraLdsDwGranularity =
+          STM.getGeneration() >= AMDGPUSubtarget::GFX11 ? 256 : 128;
+      MD->setGraphicsRegisters(
+          ".ps_extra_lds_size",
+          (unsigned)(ExtraLDSSize * ExtraLdsDwGranularity * sizeof(uint32_t)));
+
       // Set PsInputEna and PsInputAddr .spi_ps_input_ena and .spi_ps_input_addr
       static StringLiteral const PsInputFields[] = {
           ".persp_sample_ena",    ".persp_center_ena",

diff  --git a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
index 80606364b230b..cabc11037017e 100644
--- a/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
+++ b/llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
@@ -110,7 +110,6 @@
 ; CHECK-NEXT:      .ps:
 ; CHECK-NEXT:        .debug_mode:     false
 ; CHECK-NEXT:        .entry_point:    ps_shader
-; CHECK-NEXT:        .float_mode:     0xf0
 ; CHECK-NEXT:        .ieee_mode:      false
 ; CHECK-NEXT:        .mem_ordered:    true
 ; CHECK-NEXT:        .scratch_en:     false