[llvm] 86f6e77 - [GlobalIsel][X86] Update legalization of G_FPEXT/G_FPTRUNC
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 9 02:39:15 PDT 2023
Author: Simon Pilgrim
Date: 2023-06-09T10:36:32+01:00
New Revision: 86f6e77923010e61fa494e58a0281dfe10288533
URL: https://github.com/llvm/llvm-project/commit/86f6e77923010e61fa494e58a0281dfe10288533
DIFF: https://github.com/llvm/llvm-project/commit/86f6e77923010e61fa494e58a0281dfe10288533.diff
LOG: [GlobalIsel][X86] Update legalization of G_FPEXT/G_FPTRUNC
Replace the legacy legalizer versions
Added:
Modified:
llvm/lib/Target/X86/X86LegalizerInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
index e5175211a3224..6af45cf698d9e 100644
--- a/llvm/lib/Target/X86/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/X86LegalizerInfo.cpp
@@ -308,6 +308,21 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
(HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query));
});
+ // fp extension
+ getActionDefinitionsBuilder(G_FPEXT).legalIf([=](const LegalityQuery &Query) {
+ return (HasSSE2 && typePairInSet(0, 1, {{s64, s32}})(Query)) ||
+ (HasAVX && typePairInSet(0, 1, {{v4s64, v4s32}})(Query)) ||
+ (HasAVX512 && typePairInSet(0, 1, {{v8s64, v8s32}})(Query));
+ });
+
+ // fp truncation
+ getActionDefinitionsBuilder(G_FPTRUNC).legalIf(
+ [=](const LegalityQuery &Query) {
+ return (HasSSE2 && typePairInSet(0, 1, {{s32, s64}})(Query)) ||
+ (HasAVX && typePairInSet(0, 1, {{v4s32, v4s64}})(Query)) ||
+ (HasAVX512 && typePairInSet(0, 1, {{v8s32, v8s64}})(Query));
+ });
+
// todo: vectors and address spaces
getActionDefinitionsBuilder(G_SELECT)
.legalFor({{s8, s32}, {s16, s32}, {s32, s32}, {s64, s32},
@@ -474,8 +489,6 @@ void X86LegalizerInfo::setLegalizerInfoSSE2() {
if (!Subtarget.hasSSE2())
return;
- const LLT s32 = LLT::scalar(32);
- const LLT s64 = LLT::scalar(64);
const LLT v16s8 = LLT::fixed_vector(16, 8);
const LLT v8s16 = LLT::fixed_vector(8, 16);
const LLT v4s32 = LLT::fixed_vector(4, 32);
@@ -488,12 +501,6 @@ void X86LegalizerInfo::setLegalizerInfoSSE2() {
auto &LegacyInfo = getLegacyLegalizerInfo();
- LegacyInfo.setAction({G_FPEXT, s64}, LegacyLegalizeActions::Legal);
- LegacyInfo.setAction({G_FPEXT, 1, s32}, LegacyLegalizeActions::Legal);
-
- LegacyInfo.setAction({G_FPTRUNC, s32}, LegacyLegalizeActions::Legal);
- LegacyInfo.setAction({G_FPTRUNC, 1, s64}, LegacyLegalizeActions::Legal);
-
// Merge/Unmerge
for (const auto &Ty :
{v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) {
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