[llvm] c778ca2 - [X86][BF16] Split vNbf16 vectors according to vNf16

[Phoebe Wang via llvm-commits]

Author: Phoebe Wang
Date: 2023-06-09T09:04:56+08:00
New Revision: c778ca201efecc9e79d3b33224e00b247ac2daf1

URL: https://github.com/llvm/llvm-project/commit/c778ca201efecc9e79d3b33224e00b247ac2daf1
DIFF: https://github.com/llvm/llvm-project/commit/c778ca201efecc9e79d3b33224e00b247ac2daf1.diff

LOG: [X86][BF16] Split vNbf16 vectors according to vNf16

Fixes #63017

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D151778

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/bfloat.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0bab667b49db3..6be8d8223aa30 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2672,6 +2672,10 @@ unsigned X86TargetLowering::getVectorTypeBreakdownForCallingConv(
     return 2;
   }
 
+  // Split vNbf16 vectors according to vNf16.
+  if (VT.isVector() && VT.getVectorElementType() == MVT::bf16)
+    VT = VT.changeVectorElementType(MVT::f16);
+
   return TargetLowering::getVectorTypeBreakdownForCallingConv(Context, CC, VT, IntermediateVT,
                                               NumIntermediates, RegisterVT);
 }

diff  --git a/llvm/test/CodeGen/X86/bfloat.ll b/llvm/test/CodeGen/X86/bfloat.ll
index c67c947c730b9..4caeaf381c874 100644
--- a/llvm/test/CodeGen/X86/bfloat.ll
+++ b/llvm/test/CodeGen/X86/bfloat.ll
@@ -565,3 +565,19 @@ define <2 x bfloat> @pr62997(bfloat %a, bfloat %b) {
   %2 = insertelement <2 x bfloat> %1, bfloat %b, i64 1
   ret <2 x bfloat> %2
 }
+
+define <32 x bfloat> @pr63017() {
+; SSE2-LABEL: pr63017:
+; SSE2:       # %bb.0:
+; SSE2-NEXT:    xorps %xmm0, %xmm0
+; SSE2-NEXT:    xorps %xmm1, %xmm1
+; SSE2-NEXT:    xorps %xmm2, %xmm2
+; SSE2-NEXT:    xorps %xmm3, %xmm3
+; SSE2-NEXT:    retq
+;
+; BF16-LABEL: pr63017:
+; BF16:       # %bb.0:
+; BF16-NEXT:    vxorps %xmm0, %xmm0, %xmm0
+; BF16-NEXT:    retq
+  ret <32 x bfloat> zeroinitializer
+}