[llvm] f10f7b0 - [RDF] Add RegisterAggr::refs to return iterator range, NFC
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 8 11:08:33 PDT 2023
Author: Krzysztof Parzyszek
Date: 2023-06-08T11:07:57-07:00
New Revision: f10f7b0dcafec3913cfe4bcff41cd5a2697ddd46
URL: https://github.com/llvm/llvm-project/commit/f10f7b0dcafec3913cfe4bcff41cd5a2697ddd46
DIFF: https://github.com/llvm/llvm-project/commit/f10f7b0dcafec3913cfe4bcff41cd5a2697ddd46.diff
LOG: [RDF] Add RegisterAggr::refs to return iterator range, NFC
Added:
Modified:
llvm/include/llvm/CodeGen/RDFRegisters.h
llvm/lib/CodeGen/RDFGraph.cpp
llvm/lib/CodeGen/RDFLiveness.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/RDFRegisters.h b/llvm/include/llvm/CodeGen/RDFRegisters.h
index c1fc79246949e..86c00aeb47666 100644
--- a/llvm/include/llvm/CodeGen/RDFRegisters.h
+++ b/llvm/include/llvm/CodeGen/RDFRegisters.h
@@ -11,6 +11,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
@@ -225,6 +226,13 @@ struct RegisterAggr {
rr_iterator rr_begin() const { return rr_iterator(*this, false); }
rr_iterator rr_end() const { return rr_iterator(*this, true); }
+ iterator_range<rr_iterator> refs() {
+ return make_range(rr_begin(), rr_end());
+ }
+ iterator_range<rr_iterator> refs() const {
+ return make_range(rr_begin(), rr_end());
+ }
+
private:
BitVector Units;
const PhysicalRegisterInfo &PRI;
diff --git a/llvm/lib/CodeGen/RDFGraph.cpp b/llvm/lib/CodeGen/RDFGraph.cpp
index 801113479852e..db2589cc2d18e 100644
--- a/llvm/lib/CodeGen/RDFGraph.cpp
+++ b/llvm/lib/CodeGen/RDFGraph.cpp
@@ -924,8 +924,7 @@ void DataFlowGraph::build(unsigned Options) {
}
// Add function-entry phi nodes for the live-in registers.
- for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) {
- RegisterRef RR = *I;
+ for (RegisterRef RR : LiveIns.refs()) {
NodeAddr<PhiNode *> PA = newPhi(EA);
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
NodeAddr<DefNode *> DA = newDef(PA, RR, PhiFlags);
@@ -950,8 +949,7 @@ void DataFlowGraph::build(unsigned Options) {
Preds.push_back(findBlock(PB));
// Build phi nodes for each live-in.
- for (auto I = EHRegs.rr_begin(), E = EHRegs.rr_end(); I != E; ++I) {
- RegisterRef RR = *I;
+ for (RegisterRef RR : EHRegs.refs()) {
NodeAddr<PhiNode *> PA = newPhi(BA);
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
// Add def:
@@ -1442,8 +1440,7 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
const RegisterAggr &Defs = PhiM[BA.Id];
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
- for (auto I = Defs.rr_begin(), E = Defs.rr_end(); I != E; ++I) {
- RegisterRef RR = *I;
+ for (RegisterRef RR : Defs.refs()) {
NodeAddr<PhiNode *> PA = newPhi(BA);
PA.Addr->addMember(newDef(PA, RR, PhiFlags), *this);
diff --git a/llvm/lib/CodeGen/RDFLiveness.cpp b/llvm/lib/CodeGen/RDFLiveness.cpp
index c3ef9ed23be08..31ab7f3ed687d 100644
--- a/llvm/lib/CodeGen/RDFLiveness.cpp
+++ b/llvm/lib/CodeGen/RDFLiveness.cpp
@@ -881,9 +881,8 @@ void Liveness::computeLiveIns() {
// dbgs() << "\tcomp = " << Print(LiveMap[&B], DFG) << '\n';
LV.clear();
- const RegisterAggr &LG = LiveMap[&B];
- for (auto I = LG.rr_begin(), E = LG.rr_end(); I != E; ++I)
- LV.push_back(*I);
+ for (RegisterRef RR : LiveMap[&B].refs())
+ LV.push_back(RR);
llvm::sort(LV);
dbgs() << "\tcomp = {";
for (auto I : LV)
@@ -903,7 +902,7 @@ void Liveness::resetLiveIns() {
B.removeLiveIn(I);
// Add the newly computed live-ins.
const RegisterAggr &LiveIns = LiveMap[&B];
- for (const RegisterRef R : make_range(LiveIns.rr_begin(), LiveIns.rr_end()))
+ for (RegisterRef R : LiveIns.refs())
B.addLiveIn({MCPhysReg(R.Reg), R.Mask});
}
}
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