[llvm] 7fc7310 - [RDF] Clang-format the sources, NFC
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 8 11:08:28 PDT 2023
Author: Krzysztof Parzyszek
Date: 2023-06-08T11:07:56-07:00
New Revision: 7fc73104e8280a6806f47c5621f0e9283be7bce7
URL: https://github.com/llvm/llvm-project/commit/7fc73104e8280a6806f47c5621f0e9283be7bce7
DIFF: https://github.com/llvm/llvm-project/commit/7fc73104e8280a6806f47c5621f0e9283be7bce7.diff
LOG: [RDF] Clang-format the sources, NFC
Added:
Modified:
llvm/include/llvm/CodeGen/RDFGraph.h
llvm/include/llvm/CodeGen/RDFLiveness.h
llvm/include/llvm/CodeGen/RDFRegisters.h
llvm/lib/CodeGen/RDFGraph.cpp
llvm/lib/CodeGen/RDFLiveness.cpp
llvm/lib/CodeGen/RDFRegisters.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/RDFGraph.h b/llvm/include/llvm/CodeGen/RDFGraph.h
index 43eb051c136ba..6fb4963b3c5c9 100644
--- a/llvm/include/llvm/CodeGen/RDFGraph.h
+++ b/llvm/include/llvm/CodeGen/RDFGraph.h
@@ -258,712 +258,695 @@ class TargetRegisterInfo;
namespace rdf {
- using NodeId = uint32_t;
-
- struct DataFlowGraph;
-
- struct NodeAttrs {
- enum : uint16_t {
- None = 0x0000, // Nothing
-
- // Types: 2 bits
- TypeMask = 0x0003,
- Code = 0x0001, // 01, Container
- Ref = 0x0002, // 10, Reference
-
- // Kind: 3 bits
- KindMask = 0x0007 << 2,
- Def = 0x0001 << 2, // 001
- Use = 0x0002 << 2, // 010
- Phi = 0x0003 << 2, // 011
- Stmt = 0x0004 << 2, // 100
- Block = 0x0005 << 2, // 101
- Func = 0x0006 << 2, // 110
-
- // Flags: 7 bits for now
- FlagMask = 0x007F << 5,
- Shadow = 0x0001 << 5, // 0000001, Has extra reaching defs.
- Clobbering = 0x0002 << 5, // 0000010, Produces unspecified values.
- PhiRef = 0x0004 << 5, // 0000100, Member of PhiNode.
- Preserving = 0x0008 << 5, // 0001000, Def can keep original bits.
- Fixed = 0x0010 << 5, // 0010000, Fixed register.
- Undef = 0x0020 << 5, // 0100000, Has no pre-existing value.
- Dead = 0x0040 << 5, // 1000000, Does not define a value.
- };
-
- static uint16_t type(uint16_t T) { return T & TypeMask; }
- static uint16_t kind(uint16_t T) { return T & KindMask; }
- static uint16_t flags(uint16_t T) { return T & FlagMask; }
+using NodeId = uint32_t;
+
+struct DataFlowGraph;
+
+struct NodeAttrs {
+ // clang-format off
+ enum : uint16_t {
+ None = 0x0000, // Nothing
+
+ // Types: 2 bits
+ TypeMask = 0x0003,
+ Code = 0x0001, // 01, Container
+ Ref = 0x0002, // 10, Reference
+
+ // Kind: 3 bits
+ KindMask = 0x0007 << 2,
+ Def = 0x0001 << 2, // 001
+ Use = 0x0002 << 2, // 010
+ Phi = 0x0003 << 2, // 011
+ Stmt = 0x0004 << 2, // 100
+ Block = 0x0005 << 2, // 101
+ Func = 0x0006 << 2, // 110
+
+ // Flags: 7 bits for now
+ FlagMask = 0x007F << 5,
+ Shadow = 0x0001 << 5, // 0000001, Has extra reaching defs.
+ Clobbering = 0x0002 << 5, // 0000010, Produces unspecified values.
+ PhiRef = 0x0004 << 5, // 0000100, Member of PhiNode.
+ Preserving = 0x0008 << 5, // 0001000, Def can keep original bits.
+ Fixed = 0x0010 << 5, // 0010000, Fixed register.
+ Undef = 0x0020 << 5, // 0100000, Has no pre-existing value.
+ Dead = 0x0040 << 5, // 1000000, Does not define a value.
+ };
+ // clang-format on
- static uint16_t set_type(uint16_t A, uint16_t T) {
- return (A & ~TypeMask) | T;
- }
+ static uint16_t type(uint16_t T) { //
+ return T & TypeMask;
+ }
+ static uint16_t kind(uint16_t T) { //
+ return T & KindMask;
+ }
+ static uint16_t flags(uint16_t T) { //
+ return T & FlagMask;
+ }
+ static uint16_t set_type(uint16_t A, uint16_t T) {
+ return (A & ~TypeMask) | T;
+ }
- static uint16_t set_kind(uint16_t A, uint16_t K) {
- return (A & ~KindMask) | K;
- }
+ static uint16_t set_kind(uint16_t A, uint16_t K) {
+ return (A & ~KindMask) | K;
+ }
- static uint16_t set_flags(uint16_t A, uint16_t F) {
- return (A & ~FlagMask) | F;
- }
+ static uint16_t set_flags(uint16_t A, uint16_t F) {
+ return (A & ~FlagMask) | F;
+ }
- // Test if A contains B.
- static bool contains(uint16_t A, uint16_t B) {
- if (type(A) != Code)
- return false;
- uint16_t KB = kind(B);
- switch (kind(A)) {
- case Func:
- return KB == Block;
- case Block:
- return KB == Phi || KB == Stmt;
- case Phi:
- case Stmt:
- return type(B) == Ref;
- }
+ // Test if A contains B.
+ static bool contains(uint16_t A, uint16_t B) {
+ if (type(A) != Code)
return false;
- }
- };
+ uint16_t KB = kind(B);
+ switch (kind(A)) {
+ case Func:
+ return KB == Block;
+ case Block:
+ return KB == Phi || KB == Stmt;
+ case Phi:
+ case Stmt:
+ return type(B) == Ref;
+ }
+ return false;
+ }
+};
- struct BuildOptions {
- enum : unsigned {
- None = 0x00,
- KeepDeadPhis = 0x01, // Do not remove dead phis during build.
- };
+struct BuildOptions {
+ enum : unsigned {
+ None = 0x00,
+ KeepDeadPhis = 0x01, // Do not remove dead phis during build.
};
+};
- template <typename T> struct NodeAddr {
- NodeAddr() = default;
- NodeAddr(T A, NodeId I) : Addr(A), Id(I) {}
+template <typename T> struct NodeAddr {
+ NodeAddr() = default;
+ NodeAddr(T A, NodeId I) : Addr(A), Id(I) {}
- // Type cast (casting constructor). The reason for having this class
- // instead of std::pair.
- template <typename S> NodeAddr(const NodeAddr<S> &NA)
- : Addr(static_cast<T>(NA.Addr)), Id(NA.Id) {}
+ // Type cast (casting constructor). The reason for having this class
+ // instead of std::pair.
+ template <typename S>
+ NodeAddr(const NodeAddr<S> &NA) : Addr(static_cast<T>(NA.Addr)), Id(NA.Id) {}
- bool operator== (const NodeAddr<T> &NA) const {
- assert((Addr == NA.Addr) == (Id == NA.Id));
- return Addr == NA.Addr;
- }
- bool operator!= (const NodeAddr<T> &NA) const {
- return !operator==(NA);
- }
+ bool operator==(const NodeAddr<T> &NA) const {
+ assert((Addr == NA.Addr) == (Id == NA.Id));
+ return Addr == NA.Addr;
+ }
+ bool operator!=(const NodeAddr<T> &NA) const { //
+ return !operator==(NA);
+ }
- T Addr = nullptr;
- NodeId Id = 0;
- };
+ T Addr = nullptr;
+ NodeId Id = 0;
+};
- struct NodeBase;
-
- // Fast memory allocation and translation between node id and node address.
- // This is really the same idea as the one underlying the "bump pointer
- // allocator", the
diff erence being in the translation. A node id is
- // composed of two components: the index of the block in which it was
- // allocated, and the index within the block. With the default settings,
- // where the number of nodes per block is 4096, the node id (minus 1) is:
- //
- // bit position: 11 0
- // +----------------------------+--------------+
- // | Index of the block |Index in block|
- // +----------------------------+--------------+
- //
- // The actual node id is the above plus 1, to avoid creating a node id of 0.
- //
- // This method significantly improved the build time, compared to using maps
- // (std::unordered_map or DenseMap) to translate between pointers and ids.
- struct NodeAllocator {
- // Amount of storage for a single node.
- enum { NodeMemSize = 32 };
-
- NodeAllocator(uint32_t NPB = 4096)
- : NodesPerBlock(NPB), BitsPerIndex(Log2_32(NPB)),
- IndexMask((1 << BitsPerIndex)-1) {
- assert(isPowerOf2_32(NPB));
- }
+struct NodeBase;
- NodeBase *ptr(NodeId N) const {
- uint32_t N1 = N-1;
- uint32_t BlockN = N1 >> BitsPerIndex;
- uint32_t Offset = (N1 & IndexMask) * NodeMemSize;
- return reinterpret_cast<NodeBase*>(Blocks[BlockN]+Offset);
- }
+// Fast memory allocation and translation between node id and node address.
+// This is really the same idea as the one underlying the "bump pointer
+// allocator", the
diff erence being in the translation. A node id is
+// composed of two components: the index of the block in which it was
+// allocated, and the index within the block. With the default settings,
+// where the number of nodes per block is 4096, the node id (minus 1) is:
+//
+// bit position: 11 0
+// +----------------------------+--------------+
+// | Index of the block |Index in block|
+// +----------------------------+--------------+
+//
+// The actual node id is the above plus 1, to avoid creating a node id of 0.
+//
+// This method significantly improved the build time, compared to using maps
+// (std::unordered_map or DenseMap) to translate between pointers and ids.
+struct NodeAllocator {
+ // Amount of storage for a single node.
+ enum { NodeMemSize = 32 };
+
+ NodeAllocator(uint32_t NPB = 4096)
+ : NodesPerBlock(NPB), BitsPerIndex(Log2_32(NPB)),
+ IndexMask((1 << BitsPerIndex) - 1) {
+ assert(isPowerOf2_32(NPB));
+ }
- NodeId id(const NodeBase *P) const;
- NodeAddr<NodeBase*> New();
- void clear();
+ NodeBase *ptr(NodeId N) const {
+ uint32_t N1 = N - 1;
+ uint32_t BlockN = N1 >> BitsPerIndex;
+ uint32_t Offset = (N1 & IndexMask) * NodeMemSize;
+ return reinterpret_cast<NodeBase *>(Blocks[BlockN] + Offset);
+ }
- private:
- void startNewBlock();
- bool needNewBlock();
+ NodeId id(const NodeBase *P) const;
+ NodeAddr<NodeBase *> New();
+ void clear();
- uint32_t makeId(uint32_t Block, uint32_t Index) const {
- // Add 1 to the id, to avoid the id of 0, which is treated as "null".
- return ((Block << BitsPerIndex) | Index) + 1;
- }
+private:
+ void startNewBlock();
+ bool needNewBlock();
- const uint32_t NodesPerBlock;
- const uint32_t BitsPerIndex;
- const uint32_t IndexMask;
- char *ActiveEnd = nullptr;
- std::vector<char*> Blocks;
- using AllocatorTy = BumpPtrAllocatorImpl<MallocAllocator, 65536>;
- AllocatorTy MemPool;
- };
+ uint32_t makeId(uint32_t Block, uint32_t Index) const {
+ // Add 1 to the id, to avoid the id of 0, which is treated as "null".
+ return ((Block << BitsPerIndex) | Index) + 1;
+ }
- using RegisterSet = std::set<RegisterRef>;
+ const uint32_t NodesPerBlock;
+ const uint32_t BitsPerIndex;
+ const uint32_t IndexMask;
+ char *ActiveEnd = nullptr;
+ std::vector<char *> Blocks;
+ using AllocatorTy = BumpPtrAllocatorImpl<MallocAllocator, 65536>;
+ AllocatorTy MemPool;
+};
- struct TargetOperandInfo {
- TargetOperandInfo(const TargetInstrInfo &tii) : TII(tii) {}
- virtual ~TargetOperandInfo() = default;
+using RegisterSet = std::set<RegisterRef>;
- virtual bool isPreserving(const MachineInstr &In, unsigned OpNum) const;
- virtual bool isClobbering(const MachineInstr &In, unsigned OpNum) const;
- virtual bool isFixedReg(const MachineInstr &In, unsigned OpNum) const;
+struct TargetOperandInfo {
+ TargetOperandInfo(const TargetInstrInfo &tii) : TII(tii) {}
+ virtual ~TargetOperandInfo() = default;
- const TargetInstrInfo &TII;
- };
+ virtual bool isPreserving(const MachineInstr &In, unsigned OpNum) const;
+ virtual bool isClobbering(const MachineInstr &In, unsigned OpNum) const;
+ virtual bool isFixedReg(const MachineInstr &In, unsigned OpNum) const;
- // Packed register reference. Only used for storage.
- struct PackedRegisterRef {
- RegisterId Reg;
- uint32_t MaskId;
- };
+ const TargetInstrInfo &TII;
+};
- struct LaneMaskIndex : private IndexedSet<LaneBitmask> {
- LaneMaskIndex() = default;
+// Packed register reference. Only used for storage.
+struct PackedRegisterRef {
+ RegisterId Reg;
+ uint32_t MaskId;
+};
- LaneBitmask getLaneMaskForIndex(uint32_t K) const {
- return K == 0 ? LaneBitmask::getAll() : get(K);
- }
+struct LaneMaskIndex : private IndexedSet<LaneBitmask> {
+ LaneMaskIndex() = default;
- uint32_t getIndexForLaneMask(LaneBitmask LM) {
- assert(LM.any());
- return LM.all() ? 0 : insert(LM);
- }
+ LaneBitmask getLaneMaskForIndex(uint32_t K) const {
+ return K == 0 ? LaneBitmask::getAll() : get(K);
+ }
- uint32_t getIndexForLaneMask(LaneBitmask LM) const {
- assert(LM.any());
- return LM.all() ? 0 : find(LM);
- }
- };
+ uint32_t getIndexForLaneMask(LaneBitmask LM) {
+ assert(LM.any());
+ return LM.all() ? 0 : insert(LM);
+ }
- struct NodeBase {
- public:
- // Make sure this is a POD.
- NodeBase() = default;
-
- uint16_t getType() const { return NodeAttrs::type(Attrs); }
- uint16_t getKind() const { return NodeAttrs::kind(Attrs); }
- uint16_t getFlags() const { return NodeAttrs::flags(Attrs); }
- NodeId getNext() const { return Next; }
-
- uint16_t getAttrs() const { return Attrs; }
- void setAttrs(uint16_t A) { Attrs = A; }
- void setFlags(uint16_t F) { setAttrs(NodeAttrs::set_flags(getAttrs(), F)); }
-
- // Insert node NA after "this" in the circular chain.
- void append(NodeAddr<NodeBase*> NA);
-
- // Initialize all members to 0.
- void init() { memset(this, 0, sizeof *this); }
-
- void setNext(NodeId N) { Next = N; }
-
- protected:
- uint16_t Attrs;
- uint16_t Reserved;
- NodeId Next; // Id of the next node in the circular chain.
- // Definitions of nested types. Using anonymous nested structs would make
- // this class definition clearer, but unnamed structs are not a part of
- // the standard.
- struct Def_struct {
- NodeId DD, DU; // Ids of the first reached def and use.
- };
- struct PhiU_struct {
- NodeId PredB; // Id of the predecessor block for a phi use.
- };
- struct Code_struct {
- void *CP; // Pointer to the actual code.
- NodeId FirstM, LastM; // Id of the first member and last.
- };
- struct Ref_struct {
- NodeId RD, Sib; // Ids of the reaching def and the sibling.
- union {
- Def_struct Def;
- PhiU_struct PhiU;
- };
- union {
- MachineOperand *Op; // Non-phi refs point to a machine operand.
- PackedRegisterRef PR; // Phi refs store register info directly.
- };
+ uint32_t getIndexForLaneMask(LaneBitmask LM) const {
+ assert(LM.any());
+ return LM.all() ? 0 : find(LM);
+ }
+};
+
+struct NodeBase {
+public:
+ // Make sure this is a POD.
+ NodeBase() = default;
+
+ uint16_t getType() const { return NodeAttrs::type(Attrs); }
+ uint16_t getKind() const { return NodeAttrs::kind(Attrs); }
+ uint16_t getFlags() const { return NodeAttrs::flags(Attrs); }
+ NodeId getNext() const { return Next; }
+
+ uint16_t getAttrs() const { return Attrs; }
+ void setAttrs(uint16_t A) { Attrs = A; }
+ void setFlags(uint16_t F) { setAttrs(NodeAttrs::set_flags(getAttrs(), F)); }
+
+ // Insert node NA after "this" in the circular chain.
+ void append(NodeAddr<NodeBase *> NA);
+
+ // Initialize all members to 0.
+ void init() { memset(this, 0, sizeof *this); }
+
+ void setNext(NodeId N) { Next = N; }
+
+protected:
+ uint16_t Attrs;
+ uint16_t Reserved;
+ NodeId Next; // Id of the next node in the circular chain.
+ // Definitions of nested types. Using anonymous nested structs would make
+ // this class definition clearer, but unnamed structs are not a part of
+ // the standard.
+ struct Def_struct {
+ NodeId DD, DU; // Ids of the first reached def and use.
+ };
+ struct PhiU_struct {
+ NodeId PredB; // Id of the predecessor block for a phi use.
+ };
+ struct Code_struct {
+ void *CP; // Pointer to the actual code.
+ NodeId FirstM, LastM; // Id of the first member and last.
+ };
+ struct Ref_struct {
+ NodeId RD, Sib; // Ids of the reaching def and the sibling.
+ union {
+ Def_struct Def;
+ PhiU_struct PhiU;
};
-
- // The actual payload.
union {
- Ref_struct Ref;
- Code_struct Code;
+ MachineOperand *Op; // Non-phi refs point to a machine operand.
+ PackedRegisterRef PR; // Phi refs store register info directly.
};
};
- // The allocator allocates chunks of 32 bytes for each node. The fact that
- // each node takes 32 bytes in memory is used for fast translation between
- // the node id and the node address.
- static_assert(sizeof(NodeBase) <= NodeAllocator::NodeMemSize,
- "NodeBase must be at most NodeAllocator::NodeMemSize bytes");
- using NodeList = SmallVector<NodeAddr<NodeBase *>, 4>;
- using NodeSet = std::set<NodeId>;
+ // The actual payload.
+ union {
+ Ref_struct Ref;
+ Code_struct Code;
+ };
+};
+// The allocator allocates chunks of 32 bytes for each node. The fact that
+// each node takes 32 bytes in memory is used for fast translation between
+// the node id and the node address.
+static_assert(sizeof(NodeBase) <= NodeAllocator::NodeMemSize,
+ "NodeBase must be at most NodeAllocator::NodeMemSize bytes");
- struct RefNode : public NodeBase {
- RefNode() = default;
+using NodeList = SmallVector<NodeAddr<NodeBase *>, 4>;
+using NodeSet = std::set<NodeId>;
- RegisterRef getRegRef(const DataFlowGraph &G) const;
+struct RefNode : public NodeBase {
+ RefNode() = default;
- MachineOperand &getOp() {
- assert(!(getFlags() & NodeAttrs::PhiRef));
- return *Ref.Op;
- }
+ RegisterRef getRegRef(const DataFlowGraph &G) const;
- void setRegRef(RegisterRef RR, DataFlowGraph &G);
- void setRegRef(MachineOperand *Op, DataFlowGraph &G);
+ MachineOperand &getOp() {
+ assert(!(getFlags() & NodeAttrs::PhiRef));
+ return *Ref.Op;
+ }
- NodeId getReachingDef() const {
- return Ref.RD;
- }
- void setReachingDef(NodeId RD) {
- Ref.RD = RD;
- }
+ void setRegRef(RegisterRef RR, DataFlowGraph &G);
+ void setRegRef(MachineOperand *Op, DataFlowGraph &G);
- NodeId getSibling() const {
- return Ref.Sib;
- }
- void setSibling(NodeId Sib) {
- Ref.Sib = Sib;
- }
+ NodeId getReachingDef() const { return Ref.RD; }
+ void setReachingDef(NodeId RD) { Ref.RD = RD; }
- bool isUse() const {
- assert(getType() == NodeAttrs::Ref);
- return getKind() == NodeAttrs::Use;
- }
+ NodeId getSibling() const { return Ref.Sib; }
+ void setSibling(NodeId Sib) { Ref.Sib = Sib; }
- bool isDef() const {
- assert(getType() == NodeAttrs::Ref);
- return getKind() == NodeAttrs::Def;
- }
-
- template <typename Predicate>
- NodeAddr<RefNode*> getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
- const DataFlowGraph &G);
- NodeAddr<NodeBase*> getOwner(const DataFlowGraph &G);
- };
+ bool isUse() const {
+ assert(getType() == NodeAttrs::Ref);
+ return getKind() == NodeAttrs::Use;
+ }
- struct DefNode : public RefNode {
- NodeId getReachedDef() const {
- return Ref.Def.DD;
- }
- void setReachedDef(NodeId D) {
- Ref.Def.DD = D;
- }
- NodeId getReachedUse() const {
- return Ref.Def.DU;
- }
- void setReachedUse(NodeId U) {
- Ref.Def.DU = U;
- }
+ bool isDef() const {
+ assert(getType() == NodeAttrs::Ref);
+ return getKind() == NodeAttrs::Def;
+ }
- void linkToDef(NodeId Self, NodeAddr<DefNode*> DA);
- };
+ template <typename Predicate>
+ NodeAddr<RefNode *> getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
+ const DataFlowGraph &G);
+ NodeAddr<NodeBase *> getOwner(const DataFlowGraph &G);
+};
+
+struct DefNode : public RefNode {
+ NodeId getReachedDef() const { return Ref.Def.DD; }
+ void setReachedDef(NodeId D) { Ref.Def.DD = D; }
+ NodeId getReachedUse() const { return Ref.Def.DU; }
+ void setReachedUse(NodeId U) { Ref.Def.DU = U; }
+
+ void linkToDef(NodeId Self, NodeAddr<DefNode *> DA);
+};
+
+struct UseNode : public RefNode {
+ void linkToDef(NodeId Self, NodeAddr<DefNode *> DA);
+};
+
+struct PhiUseNode : public UseNode {
+ NodeId getPredecessor() const {
+ assert(getFlags() & NodeAttrs::PhiRef);
+ return Ref.PhiU.PredB;
+ }
+ void setPredecessor(NodeId B) {
+ assert(getFlags() & NodeAttrs::PhiRef);
+ Ref.PhiU.PredB = B;
+ }
+};
- struct UseNode : public RefNode {
- void linkToDef(NodeId Self, NodeAddr<DefNode*> DA);
- };
+struct CodeNode : public NodeBase {
+ template <typename T> T getCode() const { //
+ return static_cast<T>(Code.CP);
+ }
+ void setCode(void *C) { Code.CP = C; }
- struct PhiUseNode : public UseNode {
- NodeId getPredecessor() const {
- assert(getFlags() & NodeAttrs::PhiRef);
- return Ref.PhiU.PredB;
- }
- void setPredecessor(NodeId B) {
- assert(getFlags() & NodeAttrs::PhiRef);
- Ref.PhiU.PredB = B;
- }
- };
+ NodeAddr<NodeBase *> getFirstMember(const DataFlowGraph &G) const;
+ NodeAddr<NodeBase *> getLastMember(const DataFlowGraph &G) const;
+ void addMember(NodeAddr<NodeBase *> NA, const DataFlowGraph &G);
+ void addMemberAfter(NodeAddr<NodeBase *> MA, NodeAddr<NodeBase *> NA,
+ const DataFlowGraph &G);
+ void removeMember(NodeAddr<NodeBase *> NA, const DataFlowGraph &G);
- struct CodeNode : public NodeBase {
- template <typename T> T getCode() const {
- return static_cast<T>(Code.CP);
- }
- void setCode(void *C) {
- Code.CP = C;
- }
+ NodeList members(const DataFlowGraph &G) const;
+ template <typename Predicate>
+ NodeList members_if(Predicate P, const DataFlowGraph &G) const;
+};
- NodeAddr<NodeBase*> getFirstMember(const DataFlowGraph &G) const;
- NodeAddr<NodeBase*> getLastMember(const DataFlowGraph &G) const;
- void addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G);
- void addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
- const DataFlowGraph &G);
- void removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G);
+struct InstrNode : public CodeNode {
+ NodeAddr<NodeBase *> getOwner(const DataFlowGraph &G);
+};
- NodeList members(const DataFlowGraph &G) const;
- template <typename Predicate>
- NodeList members_if(Predicate P, const DataFlowGraph &G) const;
- };
+struct PhiNode : public InstrNode {
+ MachineInstr *getCode() const { return nullptr; }
+};
- struct InstrNode : public CodeNode {
- NodeAddr<NodeBase*> getOwner(const DataFlowGraph &G);
- };
+struct StmtNode : public InstrNode {
+ MachineInstr *getCode() const { //
+ return CodeNode::getCode<MachineInstr *>();
+ }
+};
- struct PhiNode : public InstrNode {
- MachineInstr *getCode() const {
- return nullptr;
- }
- };
+struct BlockNode : public CodeNode {
+ MachineBasicBlock *getCode() const {
+ return CodeNode::getCode<MachineBasicBlock *>();
+ }
- struct StmtNode : public InstrNode {
- MachineInstr *getCode() const {
- return CodeNode::getCode<MachineInstr*>();
- }
- };
+ void addPhi(NodeAddr<PhiNode *> PA, const DataFlowGraph &G);
+};
- struct BlockNode : public CodeNode {
- MachineBasicBlock *getCode() const {
- return CodeNode::getCode<MachineBasicBlock*>();
- }
+struct FuncNode : public CodeNode {
+ MachineFunction *getCode() const {
+ return CodeNode::getCode<MachineFunction *>();
+ }
- void addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G);
- };
+ NodeAddr<BlockNode *> findBlock(const MachineBasicBlock *BB,
+ const DataFlowGraph &G) const;
+ NodeAddr<BlockNode *> getEntryBlock(const DataFlowGraph &G);
+};
+
+struct DataFlowGraph {
+ DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
+ const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
+ const MachineDominanceFrontier &mdf);
+ DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
+ const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
+ const MachineDominanceFrontier &mdf,
+ const TargetOperandInfo &toi);
+
+ NodeBase *ptr(NodeId N) const;
+ template <typename T> T ptr(NodeId N) const { //
+ return static_cast<T>(ptr(N));
+ }
- struct FuncNode : public CodeNode {
- MachineFunction *getCode() const {
- return CodeNode::getCode<MachineFunction*>();
- }
+ NodeId id(const NodeBase *P) const;
- NodeAddr<BlockNode*> findBlock(const MachineBasicBlock *BB,
- const DataFlowGraph &G) const;
- NodeAddr<BlockNode*> getEntryBlock(const DataFlowGraph &G);
- };
+ template <typename T> NodeAddr<T> addr(NodeId N) const {
+ return {ptr<T>(N), N};
+ }
- struct DataFlowGraph {
- DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
- const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
- const MachineDominanceFrontier &mdf);
- DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
- const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
- const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi);
-
- NodeBase *ptr(NodeId N) const;
- template <typename T> T ptr(NodeId N) const {
- return static_cast<T>(ptr(N));
- }
+ NodeAddr<FuncNode *> getFunc() const { return Func; }
+ MachineFunction &getMF() const { return MF; }
+ const TargetInstrInfo &getTII() const { return TII; }
+ const TargetRegisterInfo &getTRI() const { return TRI; }
+ const PhysicalRegisterInfo &getPRI() const { return PRI; }
+ const MachineDominatorTree &getDT() const { return MDT; }
+ const MachineDominanceFrontier &getDF() const { return MDF; }
+ const RegisterAggr &getLiveIns() const { return LiveIns; }
- NodeId id(const NodeBase *P) const;
+ struct DefStack {
+ DefStack() = default;
- template <typename T> NodeAddr<T> addr(NodeId N) const {
- return { ptr<T>(N), N };
- }
+ bool empty() const { return Stack.empty() || top() == bottom(); }
- NodeAddr<FuncNode*> getFunc() const { return Func; }
- MachineFunction &getMF() const { return MF; }
- const TargetInstrInfo &getTII() const { return TII; }
- const TargetRegisterInfo &getTRI() const { return TRI; }
- const PhysicalRegisterInfo &getPRI() const { return PRI; }
- const MachineDominatorTree &getDT() const { return MDT; }
- const MachineDominanceFrontier &getDF() const { return MDF; }
- const RegisterAggr &getLiveIns() const { return LiveIns; }
+ private:
+ using value_type = NodeAddr<DefNode *>;
+ struct Iterator {
+ using value_type = DefStack::value_type;
- struct DefStack {
- DefStack() = default;
+ Iterator &up() {
+ Pos = DS.nextUp(Pos);
+ return *this;
+ }
+ Iterator &down() {
+ Pos = DS.nextDown(Pos);
+ return *this;
+ }
- bool empty() const { return Stack.empty() || top() == bottom(); }
+ value_type operator*() const {
+ assert(Pos >= 1);
+ return DS.Stack[Pos - 1];
+ }
+ const value_type *operator->() const {
+ assert(Pos >= 1);
+ return &DS.Stack[Pos - 1];
+ }
+ bool operator==(const Iterator &It) const { return Pos == It.Pos; }
+ bool operator!=(const Iterator &It) const { return Pos != It.Pos; }
private:
- using value_type = NodeAddr<DefNode *>;
- struct Iterator {
- using value_type = DefStack::value_type;
-
- Iterator &up() { Pos = DS.nextUp(Pos); return *this; }
- Iterator &down() { Pos = DS.nextDown(Pos); return *this; }
-
- value_type operator*() const {
- assert(Pos >= 1);
- return DS.Stack[Pos-1];
- }
- const value_type *operator->() const {
- assert(Pos >= 1);
- return &DS.Stack[Pos-1];
- }
- bool operator==(const Iterator &It) const { return Pos == It.Pos; }
- bool operator!=(const Iterator &It) const { return Pos != It.Pos; }
-
- private:
- friend struct DefStack;
-
- Iterator(const DefStack &S, bool Top);
-
- // Pos-1 is the index in the StorageType object that corresponds to
- // the top of the DefStack.
- const DefStack &DS;
- unsigned Pos;
- };
-
- public:
- using iterator = Iterator;
-
- iterator top() const { return Iterator(*this, true); }
- iterator bottom() const { return Iterator(*this, false); }
- unsigned size() const;
-
- void push(NodeAddr<DefNode*> DA) { Stack.push_back(DA); }
- void pop();
- void start_block(NodeId N);
- void clear_block(NodeId N);
+ friend struct DefStack;
- private:
- friend struct Iterator;
+ Iterator(const DefStack &S, bool Top);
- using StorageType = std::vector<value_type>;
+ // Pos-1 is the index in the StorageType object that corresponds to
+ // the top of the DefStack.
+ const DefStack &DS;
+ unsigned Pos;
+ };
- bool isDelimiter(const StorageType::value_type &P, NodeId N = 0) const {
- return (P.Addr == nullptr) && (N == 0 || P.Id == N);
- }
+ public:
+ using iterator = Iterator;
- unsigned nextUp(unsigned P) const;
- unsigned nextDown(unsigned P) const;
+ iterator top() const { return Iterator(*this, true); }
+ iterator bottom() const { return Iterator(*this, false); }
+ unsigned size() const;
- StorageType Stack;
- };
+ void push(NodeAddr<DefNode *> DA) { Stack.push_back(DA); }
+ void pop();
+ void start_block(NodeId N);
+ void clear_block(NodeId N);
- // Make this std::unordered_map for speed of accessing elements.
- // Map: Register (physical or virtual) -> DefStack
- using DefStackMap = std::unordered_map<RegisterId, DefStack>;
+ private:
+ friend struct Iterator;
- void build(unsigned Options = BuildOptions::None);
- void pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM);
- void markBlock(NodeId B, DefStackMap &DefM);
- void releaseBlock(NodeId B, DefStackMap &DefM);
+ using StorageType = std::vector<value_type>;
- PackedRegisterRef pack(RegisterRef RR) {
- return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) };
- }
- PackedRegisterRef pack(RegisterRef RR) const {
- return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) };
- }
- RegisterRef unpack(PackedRegisterRef PR) const {
- return RegisterRef(PR.Reg, LMI.getLaneMaskForIndex(PR.MaskId));
+ bool isDelimiter(const StorageType::value_type &P, NodeId N = 0) const {
+ return (P.Addr == nullptr) && (N == 0 || P.Id == N);
}
- RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const;
- RegisterRef makeRegRef(const MachineOperand &Op) const;
+ unsigned nextUp(unsigned P) const;
+ unsigned nextDown(unsigned P) const;
- NodeAddr<RefNode*> getNextRelated(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const;
- NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA, bool Create);
- NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const;
+ StorageType Stack;
+ };
- NodeList getRelatedRefs(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const;
+ // Make this std::unordered_map for speed of accessing elements.
+ // Map: Register (physical or virtual) -> DefStack
+ using DefStackMap = std::unordered_map<RegisterId, DefStack>;
- NodeAddr<BlockNode*> findBlock(MachineBasicBlock *BB) const {
- return BlockNodes.at(BB);
- }
+ void build(unsigned Options = BuildOptions::None);
+ void pushAllDefs(NodeAddr<InstrNode *> IA, DefStackMap &DM);
+ void markBlock(NodeId B, DefStackMap &DefM);
+ void releaseBlock(NodeId B, DefStackMap &DefM);
- void unlinkUse(NodeAddr<UseNode*> UA, bool RemoveFromOwner) {
- unlinkUseDF(UA);
- if (RemoveFromOwner)
- removeFromOwner(UA);
- }
+ PackedRegisterRef pack(RegisterRef RR) {
+ return {RR.Reg, LMI.getIndexForLaneMask(RR.Mask)};
+ }
+ PackedRegisterRef pack(RegisterRef RR) const {
+ return {RR.Reg, LMI.getIndexForLaneMask(RR.Mask)};
+ }
+ RegisterRef unpack(PackedRegisterRef PR) const {
+ return RegisterRef(PR.Reg, LMI.getLaneMaskForIndex(PR.MaskId));
+ }
- void unlinkDef(NodeAddr<DefNode*> DA, bool RemoveFromOwner) {
- unlinkDefDF(DA);
- if (RemoveFromOwner)
- removeFromOwner(DA);
- }
+ RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const;
+ RegisterRef makeRegRef(const MachineOperand &Op) const;
- // Some useful filters.
- template <uint16_t Kind>
- static bool IsRef(const NodeAddr<NodeBase*> BA) {
- return BA.Addr->getType() == NodeAttrs::Ref &&
- BA.Addr->getKind() == Kind;
- }
+ NodeAddr<RefNode *> getNextRelated(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const;
+ NodeAddr<RefNode *> getNextShadow(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA, bool Create);
+ NodeAddr<RefNode *> getNextShadow(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const;
- template <uint16_t Kind>
- static bool IsCode(const NodeAddr<NodeBase*> BA) {
- return BA.Addr->getType() == NodeAttrs::Code &&
- BA.Addr->getKind() == Kind;
- }
+ NodeList getRelatedRefs(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const;
- static bool IsDef(const NodeAddr<NodeBase*> BA) {
- return BA.Addr->getType() == NodeAttrs::Ref &&
- BA.Addr->getKind() == NodeAttrs::Def;
- }
+ NodeAddr<BlockNode *> findBlock(MachineBasicBlock *BB) const {
+ return BlockNodes.at(BB);
+ }
- static bool IsUse(const NodeAddr<NodeBase*> BA) {
- return BA.Addr->getType() == NodeAttrs::Ref &&
- BA.Addr->getKind() == NodeAttrs::Use;
- }
+ void unlinkUse(NodeAddr<UseNode *> UA, bool RemoveFromOwner) {
+ unlinkUseDF(UA);
+ if (RemoveFromOwner)
+ removeFromOwner(UA);
+ }
- static bool IsPhi(const NodeAddr<NodeBase*> BA) {
- return BA.Addr->getType() == NodeAttrs::Code &&
- BA.Addr->getKind() == NodeAttrs::Phi;
- }
+ void unlinkDef(NodeAddr<DefNode *> DA, bool RemoveFromOwner) {
+ unlinkDefDF(DA);
+ if (RemoveFromOwner)
+ removeFromOwner(DA);
+ }
- static bool IsPreservingDef(const NodeAddr<DefNode*> DA) {
- uint16_t Flags = DA.Addr->getFlags();
- return (Flags & NodeAttrs::Preserving) && !(Flags & NodeAttrs::Undef);
- }
+ // Some useful filters.
+ template <uint16_t Kind> static bool IsRef(const NodeAddr<NodeBase *> BA) {
+ return BA.Addr->getType() == NodeAttrs::Ref && BA.Addr->getKind() == Kind;
+ }
- private:
- void reset();
-
- RegisterSet getLandingPadLiveIns() const;
-
- NodeAddr<NodeBase*> newNode(uint16_t Attrs);
- NodeAddr<NodeBase*> cloneNode(const NodeAddr<NodeBase*> B);
- NodeAddr<UseNode*> newUse(NodeAddr<InstrNode*> Owner,
- MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
- NodeAddr<PhiUseNode*> newPhiUse(NodeAddr<PhiNode*> Owner,
- RegisterRef RR, NodeAddr<BlockNode*> PredB,
- uint16_t Flags = NodeAttrs::PhiRef);
- NodeAddr<DefNode*> newDef(NodeAddr<InstrNode*> Owner,
- MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
- NodeAddr<DefNode*> newDef(NodeAddr<InstrNode*> Owner,
- RegisterRef RR, uint16_t Flags = NodeAttrs::PhiRef);
- NodeAddr<PhiNode*> newPhi(NodeAddr<BlockNode*> Owner);
- NodeAddr<StmtNode*> newStmt(NodeAddr<BlockNode*> Owner,
- MachineInstr *MI);
- NodeAddr<BlockNode*> newBlock(NodeAddr<FuncNode*> Owner,
- MachineBasicBlock *BB);
- NodeAddr<FuncNode*> newFunc(MachineFunction *MF);
-
- template <typename Predicate>
- std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
- locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
- Predicate P) const;
-
- using BlockRefsMap = std::map<NodeId, RegisterSet>;
-
- void buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In);
- void recordDefsForDF(BlockRefsMap &PhiM, NodeAddr<BlockNode*> BA);
- void buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
- NodeAddr<BlockNode*> BA);
- void removeUnusedPhis();
-
- void pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DM);
- void pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM);
- template <typename T> void linkRefUp(NodeAddr<InstrNode*> IA,
- NodeAddr<T> TA, DefStack &DS);
- template <typename Predicate> void linkStmtRefs(DefStackMap &DefM,
- NodeAddr<StmtNode*> SA, Predicate P);
- void linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA);
-
- void unlinkUseDF(NodeAddr<UseNode*> UA);
- void unlinkDefDF(NodeAddr<DefNode*> DA);
-
- void removeFromOwner(NodeAddr<RefNode*> RA) {
- NodeAddr<InstrNode*> IA = RA.Addr->getOwner(*this);
- IA.Addr->removeMember(RA, *this);
- }
+ template <uint16_t Kind> static bool IsCode(const NodeAddr<NodeBase *> BA) {
+ return BA.Addr->getType() == NodeAttrs::Code && BA.Addr->getKind() == Kind;
+ }
- // Default TOI object, if not given in the constructor.
- std::unique_ptr<TargetOperandInfo> DefaultTOI;
-
- MachineFunction &MF;
- const TargetInstrInfo &TII;
- const TargetRegisterInfo &TRI;
- const PhysicalRegisterInfo PRI;
- const MachineDominatorTree &MDT;
- const MachineDominanceFrontier &MDF;
- const TargetOperandInfo &TOI;
-
- RegisterAggr LiveIns;
- NodeAddr<FuncNode*> Func;
- NodeAllocator Memory;
- // Local map: MachineBasicBlock -> NodeAddr<BlockNode*>
- std::map<MachineBasicBlock*,NodeAddr<BlockNode*>> BlockNodes;
- // Lane mask map.
- LaneMaskIndex LMI;
- }; // struct DataFlowGraph
+ static bool IsDef(const NodeAddr<NodeBase *> BA) {
+ return BA.Addr->getType() == NodeAttrs::Ref &&
+ BA.Addr->getKind() == NodeAttrs::Def;
+ }
- template <typename Predicate>
- NodeAddr<RefNode*> RefNode::getNextRef(RegisterRef RR, Predicate P,
- bool NextOnly, const DataFlowGraph &G) {
- // Get the "Next" reference in the circular list that references RR and
- // satisfies predicate "Pred".
- auto NA = G.addr<NodeBase*>(getNext());
-
- while (NA.Addr != this) {
- if (NA.Addr->getType() == NodeAttrs::Ref) {
- NodeAddr<RefNode*> RA = NA;
- if (RA.Addr->getRegRef(G) == RR && P(NA))
- return NA;
- if (NextOnly)
- break;
- NA = G.addr<NodeBase*>(NA.Addr->getNext());
- } else {
- // We've hit the beginning of the chain.
- assert(NA.Addr->getType() == NodeAttrs::Code);
- NodeAddr<CodeNode*> CA = NA;
- NA = CA.Addr->getFirstMember(G);
- }
- }
- // Return the equivalent of "nullptr" if such a node was not found.
- return NodeAddr<RefNode*>();
+ static bool IsUse(const NodeAddr<NodeBase *> BA) {
+ return BA.Addr->getType() == NodeAttrs::Ref &&
+ BA.Addr->getKind() == NodeAttrs::Use;
+ }
+
+ static bool IsPhi(const NodeAddr<NodeBase *> BA) {
+ return BA.Addr->getType() == NodeAttrs::Code &&
+ BA.Addr->getKind() == NodeAttrs::Phi;
}
+ static bool IsPreservingDef(const NodeAddr<DefNode *> DA) {
+ uint16_t Flags = DA.Addr->getFlags();
+ return (Flags & NodeAttrs::Preserving) && !(Flags & NodeAttrs::Undef);
+ }
+
+private:
+ void reset();
+
+ RegisterSet getLandingPadLiveIns() const;
+
+ NodeAddr<NodeBase *> newNode(uint16_t Attrs);
+ NodeAddr<NodeBase *> cloneNode(const NodeAddr<NodeBase *> B);
+ NodeAddr<UseNode *> newUse(NodeAddr<InstrNode *> Owner, MachineOperand &Op,
+ uint16_t Flags = NodeAttrs::None);
+ NodeAddr<PhiUseNode *> newPhiUse(NodeAddr<PhiNode *> Owner, RegisterRef RR,
+ NodeAddr<BlockNode *> PredB,
+ uint16_t Flags = NodeAttrs::PhiRef);
+ NodeAddr<DefNode *> newDef(NodeAddr<InstrNode *> Owner, MachineOperand &Op,
+ uint16_t Flags = NodeAttrs::None);
+ NodeAddr<DefNode *> newDef(NodeAddr<InstrNode *> Owner, RegisterRef RR,
+ uint16_t Flags = NodeAttrs::PhiRef);
+ NodeAddr<PhiNode *> newPhi(NodeAddr<BlockNode *> Owner);
+ NodeAddr<StmtNode *> newStmt(NodeAddr<BlockNode *> Owner, MachineInstr *MI);
+ NodeAddr<BlockNode *> newBlock(NodeAddr<FuncNode *> Owner,
+ MachineBasicBlock *BB);
+ NodeAddr<FuncNode *> newFunc(MachineFunction *MF);
+
+ template <typename Predicate>
+ std::pair<NodeAddr<RefNode *>, NodeAddr<RefNode *>>
+ locateNextRef(NodeAddr<InstrNode *> IA, NodeAddr<RefNode *> RA,
+ Predicate P) const;
+
+ using BlockRefsMap = std::map<NodeId, RegisterSet>;
+
+ void buildStmt(NodeAddr<BlockNode *> BA, MachineInstr &In);
+ void recordDefsForDF(BlockRefsMap &PhiM, NodeAddr<BlockNode *> BA);
+ void buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
+ NodeAddr<BlockNode *> BA);
+ void removeUnusedPhis();
+
+ void pushClobbers(NodeAddr<InstrNode *> IA, DefStackMap &DM);
+ void pushDefs(NodeAddr<InstrNode *> IA, DefStackMap &DM);
+ template <typename T>
+ void linkRefUp(NodeAddr<InstrNode *> IA, NodeAddr<T> TA, DefStack &DS);
template <typename Predicate>
- NodeList CodeNode::members_if(Predicate P, const DataFlowGraph &G) const {
- NodeList MM;
- auto M = getFirstMember(G);
- if (M.Id == 0)
- return MM;
-
- while (M.Addr != this) {
- if (P(M))
- MM.push_back(M);
- M = G.addr<NodeBase*>(M.Addr->getNext());
+ void linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode *> SA, Predicate P);
+ void linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode *> BA);
+
+ void unlinkUseDF(NodeAddr<UseNode *> UA);
+ void unlinkDefDF(NodeAddr<DefNode *> DA);
+
+ void removeFromOwner(NodeAddr<RefNode *> RA) {
+ NodeAddr<InstrNode *> IA = RA.Addr->getOwner(*this);
+ IA.Addr->removeMember(RA, *this);
+ }
+
+ // Default TOI object, if not given in the constructor.
+ std::unique_ptr<TargetOperandInfo> DefaultTOI;
+
+ MachineFunction &MF;
+ const TargetInstrInfo &TII;
+ const TargetRegisterInfo &TRI;
+ const PhysicalRegisterInfo PRI;
+ const MachineDominatorTree &MDT;
+ const MachineDominanceFrontier &MDF;
+ const TargetOperandInfo &TOI;
+
+ RegisterAggr LiveIns;
+ NodeAddr<FuncNode *> Func;
+ NodeAllocator Memory;
+ // Local map: MachineBasicBlock -> NodeAddr<BlockNode*>
+ std::map<MachineBasicBlock *, NodeAddr<BlockNode *>> BlockNodes;
+ // Lane mask map.
+ LaneMaskIndex LMI;
+}; // struct DataFlowGraph
+
+template <typename Predicate>
+NodeAddr<RefNode *> RefNode::getNextRef(RegisterRef RR, Predicate P,
+ bool NextOnly, const DataFlowGraph &G) {
+ // Get the "Next" reference in the circular list that references RR and
+ // satisfies predicate "Pred".
+ auto NA = G.addr<NodeBase *>(getNext());
+
+ while (NA.Addr != this) {
+ if (NA.Addr->getType() == NodeAttrs::Ref) {
+ NodeAddr<RefNode *> RA = NA;
+ if (RA.Addr->getRegRef(G) == RR && P(NA))
+ return NA;
+ if (NextOnly)
+ break;
+ NA = G.addr<NodeBase *>(NA.Addr->getNext());
+ } else {
+ // We've hit the beginning of the chain.
+ assert(NA.Addr->getType() == NodeAttrs::Code);
+ NodeAddr<CodeNode *> CA = NA;
+ NA = CA.Addr->getFirstMember(G);
}
+ }
+ // Return the equivalent of "nullptr" if such a node was not found.
+ return NodeAddr<RefNode *>();
+}
+
+template <typename Predicate>
+NodeList CodeNode::members_if(Predicate P, const DataFlowGraph &G) const {
+ NodeList MM;
+ auto M = getFirstMember(G);
+ if (M.Id == 0)
return MM;
+
+ while (M.Addr != this) {
+ if (P(M))
+ MM.push_back(M);
+ M = G.addr<NodeBase *>(M.Addr->getNext());
}
+ return MM;
+}
- template <typename T>
- struct Print {
- Print(const T &x, const DataFlowGraph &g) : Obj(x), G(g) {}
+template <typename T> struct Print {
+ Print(const T &x, const DataFlowGraph &g) : Obj(x), G(g) {}
- const T &Obj;
- const DataFlowGraph &G;
- };
+ const T &Obj;
+ const DataFlowGraph &G;
+};
- template <typename T> Print(const T &, const DataFlowGraph &) -> Print<T>;
+template <typename T> Print(const T &, const DataFlowGraph &) -> Print<T>;
- template <typename T>
- struct PrintNode : Print<NodeAddr<T>> {
- PrintNode(const NodeAddr<T> &x, const DataFlowGraph &g)
+template <typename T> struct PrintNode : Print<NodeAddr<T>> {
+ PrintNode(const NodeAddr<T> &x, const DataFlowGraph &g)
: Print<NodeAddr<T>>(x, g) {}
- };
-
- raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterRef> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeId> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<DefNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<UseNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<NodeAddr<PhiUseNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<RefNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeList> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeSet> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<PhiNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<NodeAddr<StmtNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<NodeAddr<InstrNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<NodeAddr<BlockNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<NodeAddr<FuncNode *>> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterSet> &P);
- raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterAggr> &P);
- raw_ostream &operator<<(raw_ostream &OS,
- const Print<DataFlowGraph::DefStack> &P);
+};
+
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterRef> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeId> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<DefNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<UseNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<NodeAddr<PhiUseNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<RefNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeList> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeSet> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<PhiNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<InstrNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<BlockNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterSet> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterAggr> &P);
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<DataFlowGraph::DefStack> &P);
} // end namespace rdf
diff --git a/llvm/include/llvm/CodeGen/RDFLiveness.h b/llvm/include/llvm/CodeGen/RDFLiveness.h
index 45cd84a13007d..f2c4bec54c670 100644
--- a/llvm/include/llvm/CodeGen/RDFLiveness.h
+++ b/llvm/include/llvm/CodeGen/RDFLiveness.h
@@ -56,117 +56,121 @@ template <> struct hash<llvm::rdf::detail::NodeRef> {
namespace llvm {
namespace rdf {
- struct Liveness {
- public:
- // This is really a std::map, except that it provides a non-trivial
- // default constructor to the element accessed via [].
- struct LiveMapType {
- LiveMapType(const PhysicalRegisterInfo &pri) : Empty(pri) {}
-
- RegisterAggr &operator[] (MachineBasicBlock *B) {
- return Map.emplace(B, Empty).first->second;
- }
-
- private:
- RegisterAggr Empty;
- std::map<MachineBasicBlock*,RegisterAggr> Map;
- };
-
- using NodeRef = detail::NodeRef;
- using NodeRefSet = std::unordered_set<NodeRef>;
- using RefMap = std::unordered_map<RegisterId, NodeRefSet>;
-
- Liveness(MachineRegisterInfo &mri, const DataFlowGraph &g)
- : DFG(g), TRI(g.getTRI()), PRI(g.getPRI()), MDT(g.getDT()),
- MDF(g.getDF()), LiveMap(g.getPRI()), Empty(), NoRegs(g.getPRI()) {}
-
- NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
- bool TopShadows, bool FullChain, const RegisterAggr &DefRRs);
-
- NodeList getAllReachingDefs(NodeAddr<RefNode*> RefA) {
- return getAllReachingDefs(RefA.Addr->getRegRef(DFG), RefA, false,
- false, NoRegs);
+struct Liveness {
+public:
+ // This is really a std::map, except that it provides a non-trivial
+ // default constructor to the element accessed via [].
+ struct LiveMapType {
+ LiveMapType(const PhysicalRegisterInfo &pri) : Empty(pri) {}
+
+ RegisterAggr &operator[](MachineBasicBlock *B) {
+ return Map.emplace(B, Empty).first->second;
}
- NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode*> RefA) {
- return getAllReachingDefs(RefRR, RefA, false, false, NoRegs);
- }
+ private:
+ RegisterAggr Empty;
+ std::map<MachineBasicBlock *, RegisterAggr> Map;
+ };
- NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode*> DefA,
- const RegisterAggr &DefRRs);
+ using NodeRef = detail::NodeRef;
+ using NodeRefSet = std::unordered_set<NodeRef>;
+ using RefMap = std::unordered_map<RegisterId, NodeRefSet>;
- NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode*> DefA) {
- return getAllReachedUses(RefRR, DefA, NoRegs);
- }
+ Liveness(MachineRegisterInfo &mri, const DataFlowGraph &g)
+ : DFG(g), TRI(g.getTRI()), PRI(g.getPRI()), MDT(g.getDT()),
+ MDF(g.getDF()), LiveMap(g.getPRI()), Empty(), NoRegs(g.getPRI()) {}
- std::pair<NodeSet,bool> getAllReachingDefsRec(RegisterRef RefRR,
- NodeAddr<RefNode*> RefA, NodeSet &Visited, const NodeSet &Defs);
+ NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
+ bool TopShadows, bool FullChain,
+ const RegisterAggr &DefRRs);
- NodeAddr<RefNode*> getNearestAliasedRef(RegisterRef RefRR,
- NodeAddr<InstrNode*> IA);
+ NodeList getAllReachingDefs(NodeAddr<RefNode *> RefA) {
+ return getAllReachingDefs(RefA.Addr->getRegRef(DFG), RefA, false, false,
+ NoRegs);
+ }
- LiveMapType &getLiveMap() { return LiveMap; }
- const LiveMapType &getLiveMap() const { return LiveMap; }
+ NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode *> RefA) {
+ return getAllReachingDefs(RefRR, RefA, false, false, NoRegs);
+ }
- const RefMap &getRealUses(NodeId P) const {
- auto F = RealUseMap.find(P);
- return F == RealUseMap.end() ? Empty : F->second;
- }
+ NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode *> DefA,
+ const RegisterAggr &DefRRs);
- void computePhiInfo();
- void computeLiveIns();
- void resetLiveIns();
- void resetKills();
- void resetKills(MachineBasicBlock *B);
+ NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode *> DefA) {
+ return getAllReachedUses(RefRR, DefA, NoRegs);
+ }
- void trace(bool T) { Trace = T; }
+ std::pair<NodeSet, bool> getAllReachingDefsRec(RegisterRef RefRR,
+ NodeAddr<RefNode *> RefA,
+ NodeSet &Visited,
+ const NodeSet &Defs);
- private:
- const DataFlowGraph &DFG;
- const TargetRegisterInfo &TRI;
- const PhysicalRegisterInfo &PRI;
- const MachineDominatorTree &MDT;
- const MachineDominanceFrontier &MDF;
- LiveMapType LiveMap;
- const RefMap Empty;
- const RegisterAggr NoRegs;
- bool Trace = false;
-
- // Cache of mapping from node ids (for RefNodes) to the containing
- // basic blocks. Not computing it each time for each node reduces
- // the liveness calculation time by a large fraction.
- DenseMap<NodeId, MachineBasicBlock *> NBMap;
-
- // Phi information:
- //
- // RealUseMap
- // map: NodeId -> (map: RegisterId -> NodeRefSet)
- // phi id -> (map: register -> set of reached non-phi uses)
- DenseMap<NodeId, RefMap> RealUseMap;
-
- // Inverse iterated dominance frontier.
- std::map<MachineBasicBlock*,std::set<MachineBasicBlock*>> IIDF;
-
- // Live on entry.
- std::map<MachineBasicBlock*,RefMap> PhiLON;
-
- // Phi uses are considered to be located at the end of the block that
- // they are associated with. The reaching def of a phi use dominates the
- // block that the use corresponds to, but not the block that contains
- // the phi itself. To include these uses in the liveness propagation (up
- // the dominator tree), create a map: block -> set of uses live on exit.
- std::map<MachineBasicBlock*,RefMap> PhiLOX;
-
- MachineBasicBlock *getBlockWithRef(NodeId RN) const;
- void traverse(MachineBasicBlock *B, RefMap &LiveIn);
- void emptify(RefMap &M);
-
- std::pair<NodeSet,bool> getAllReachingDefsRecImpl(RegisterRef RefRR,
- NodeAddr<RefNode*> RefA, NodeSet &Visited, const NodeSet &Defs,
- unsigned Nest, unsigned MaxNest);
- };
+ NodeAddr<RefNode *> getNearestAliasedRef(RegisterRef RefRR,
+ NodeAddr<InstrNode *> IA);
+
+ LiveMapType &getLiveMap() { return LiveMap; }
+ const LiveMapType &getLiveMap() const { return LiveMap; }
+
+ const RefMap &getRealUses(NodeId P) const {
+ auto F = RealUseMap.find(P);
+ return F == RealUseMap.end() ? Empty : F->second;
+ }
+
+ void computePhiInfo();
+ void computeLiveIns();
+ void resetLiveIns();
+ void resetKills();
+ void resetKills(MachineBasicBlock *B);
+
+ void trace(bool T) { Trace = T; }
+
+private:
+ const DataFlowGraph &DFG;
+ const TargetRegisterInfo &TRI;
+ const PhysicalRegisterInfo &PRI;
+ const MachineDominatorTree &MDT;
+ const MachineDominanceFrontier &MDF;
+ LiveMapType LiveMap;
+ const RefMap Empty;
+ const RegisterAggr NoRegs;
+ bool Trace = false;
+
+ // Cache of mapping from node ids (for RefNodes) to the containing
+ // basic blocks. Not computing it each time for each node reduces
+ // the liveness calculation time by a large fraction.
+ DenseMap<NodeId, MachineBasicBlock *> NBMap;
+
+ // Phi information:
+ //
+ // RealUseMap
+ // map: NodeId -> (map: RegisterId -> NodeRefSet)
+ // phi id -> (map: register -> set of reached non-phi uses)
+ DenseMap<NodeId, RefMap> RealUseMap;
+
+ // Inverse iterated dominance frontier.
+ std::map<MachineBasicBlock *, std::set<MachineBasicBlock *>> IIDF;
+
+ // Live on entry.
+ std::map<MachineBasicBlock *, RefMap> PhiLON;
+
+ // Phi uses are considered to be located at the end of the block that
+ // they are associated with. The reaching def of a phi use dominates the
+ // block that the use corresponds to, but not the block that contains
+ // the phi itself. To include these uses in the liveness propagation (up
+ // the dominator tree), create a map: block -> set of uses live on exit.
+ std::map<MachineBasicBlock *, RefMap> PhiLOX;
+
+ MachineBasicBlock *getBlockWithRef(NodeId RN) const;
+ void traverse(MachineBasicBlock *B, RefMap &LiveIn);
+ void emptify(RefMap &M);
+
+ std::pair<NodeSet, bool>
+ getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
+ NodeSet &Visited, const NodeSet &Defs,
+ unsigned Nest, unsigned MaxNest);
+};
- raw_ostream &operator<<(raw_ostream &OS, const Print<Liveness::RefMap> &P);
+raw_ostream &operator<<(raw_ostream &OS, const Print<Liveness::RefMap> &P);
} // end namespace rdf
diff --git a/llvm/include/llvm/CodeGen/RDFRegisters.h b/llvm/include/llvm/CodeGen/RDFRegisters.h
index b18cbba2275c1..790bd39c7b588 100644
--- a/llvm/include/llvm/CodeGen/RDFRegisters.h
+++ b/llvm/include/llvm/CodeGen/RDFRegisters.h
@@ -26,254 +26,238 @@ class raw_ostream;
namespace rdf {
- using RegisterId = uint32_t;
-
- // Template class for a map translating uint32_t into arbitrary types.
- // The map will act like an indexed set: upon insertion of a new object,
- // it will automatically assign a new index to it. Index of 0 is treated
- // as invalid and is never allocated.
- template <typename T, unsigned N = 32>
- struct IndexedSet {
- IndexedSet() { Map.reserve(N); }
-
- T get(uint32_t Idx) const {
- // Index Idx corresponds to Map[Idx-1].
- assert(Idx != 0 && !Map.empty() && Idx-1 < Map.size());
- return Map[Idx-1];
- }
-
- uint32_t insert(T Val) {
- // Linear search.
- auto F = llvm::find(Map, Val);
- if (F != Map.end())
- return F - Map.begin() + 1;
- Map.push_back(Val);
- return Map.size(); // Return actual_index + 1.
- }
-
- uint32_t find(T Val) const {
- auto F = llvm::find(Map, Val);
- assert(F != Map.end());
+using RegisterId = uint32_t;
+
+// Template class for a map translating uint32_t into arbitrary types.
+// The map will act like an indexed set: upon insertion of a new object,
+// it will automatically assign a new index to it. Index of 0 is treated
+// as invalid and is never allocated.
+template <typename T, unsigned N = 32> struct IndexedSet {
+ IndexedSet() { Map.reserve(N); }
+
+ T get(uint32_t Idx) const {
+ // Index Idx corresponds to Map[Idx-1].
+ assert(Idx != 0 && !Map.empty() && Idx - 1 < Map.size());
+ return Map[Idx - 1];
+ }
+
+ uint32_t insert(T Val) {
+ // Linear search.
+ auto F = llvm::find(Map, Val);
+ if (F != Map.end())
return F - Map.begin() + 1;
- }
+ Map.push_back(Val);
+ return Map.size(); // Return actual_index + 1.
+ }
- uint32_t size() const { return Map.size(); }
+ uint32_t find(T Val) const {
+ auto F = llvm::find(Map, Val);
+ assert(F != Map.end());
+ return F - Map.begin() + 1;
+ }
- using const_iterator = typename std::vector<T>::const_iterator;
+ uint32_t size() const { return Map.size(); }
- const_iterator begin() const { return Map.begin(); }
- const_iterator end() const { return Map.end(); }
+ using const_iterator = typename std::vector<T>::const_iterator;
- private:
- std::vector<T> Map;
- };
+ const_iterator begin() const { return Map.begin(); }
+ const_iterator end() const { return Map.end(); }
- struct RegisterRef {
- RegisterId Reg = 0;
- LaneBitmask Mask = LaneBitmask::getNone();
+private:
+ std::vector<T> Map;
+};
+
+struct RegisterRef {
+ RegisterId Reg = 0;
+ LaneBitmask Mask = LaneBitmask::getNone();
- RegisterRef() = default;
- explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
+ RegisterRef() = default;
+ explicit RegisterRef(RegisterId R, LaneBitmask M = LaneBitmask::getAll())
: Reg(R), Mask(R != 0 ? M : LaneBitmask::getNone()) {}
- operator bool() const {
- return Reg != 0 && Mask.any();
- }
+ operator bool() const { return Reg != 0 && Mask.any(); }
- bool operator== (const RegisterRef &RR) const {
- return Reg == RR.Reg && Mask == RR.Mask;
- }
+ bool operator==(const RegisterRef &RR) const {
+ return Reg == RR.Reg && Mask == RR.Mask;
+ }
- bool operator!= (const RegisterRef &RR) const {
- return !operator==(RR);
- }
+ bool operator!=(const RegisterRef &RR) const { return !operator==(RR); }
- bool operator< (const RegisterRef &RR) const {
- return Reg < RR.Reg || (Reg == RR.Reg && Mask < RR.Mask);
- }
-
- size_t hash() const {
- return std::hash<RegisterId>{}(Reg) ^
- std::hash<LaneBitmask::Type>{}(Mask.getAsInteger());
- }
- };
+ bool operator<(const RegisterRef &RR) const {
+ return Reg < RR.Reg || (Reg == RR.Reg && Mask < RR.Mask);
+ }
+ size_t hash() const {
+ return std::hash<RegisterId>{}(Reg) ^
+ std::hash<LaneBitmask::Type>{}(Mask.getAsInteger());
+ }
+};
- struct PhysicalRegisterInfo {
- PhysicalRegisterInfo(const TargetRegisterInfo &tri,
- const MachineFunction &mf);
+struct PhysicalRegisterInfo {
+ PhysicalRegisterInfo(const TargetRegisterInfo &tri,
+ const MachineFunction &mf);
- static bool isRegMaskId(RegisterId R) {
- return Register::isStackSlot(R);
- }
+ static bool isRegMaskId(RegisterId R) { return Register::isStackSlot(R); }
- RegisterId getRegMaskId(const uint32_t *RM) const {
- return Register::index2StackSlot(RegMasks.find(RM));
- }
+ RegisterId getRegMaskId(const uint32_t *RM) const {
+ return Register::index2StackSlot(RegMasks.find(RM));
+ }
- const uint32_t *getRegMaskBits(RegisterId R) const {
- return RegMasks.get(Register::stackSlot2Index(R));
- }
+ const uint32_t *getRegMaskBits(RegisterId R) const {
+ return RegMasks.get(Register::stackSlot2Index(R));
+ }
- bool alias(RegisterRef RA, RegisterRef RB) const {
- if (!isRegMaskId(RA.Reg))
- return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB);
- return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB);
- }
+ bool alias(RegisterRef RA, RegisterRef RB) const {
+ if (!isRegMaskId(RA.Reg))
+ return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB);
+ return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB);
+ }
- std::set<RegisterId> getAliasSet(RegisterId Reg) const;
+ std::set<RegisterId> getAliasSet(RegisterId Reg) const;
- RegisterRef getRefForUnit(uint32_t U) const {
- return RegisterRef(UnitInfos[U].Reg, UnitInfos[U].Mask);
- }
+ RegisterRef getRefForUnit(uint32_t U) const {
+ return RegisterRef(UnitInfos[U].Reg, UnitInfos[U].Mask);
+ }
- const BitVector &getMaskUnits(RegisterId MaskId) const {
- return MaskInfos[Register::stackSlot2Index(MaskId)].Units;
- }
+ const BitVector &getMaskUnits(RegisterId MaskId) const {
+ return MaskInfos[Register::stackSlot2Index(MaskId)].Units;
+ }
- const BitVector &getUnitAliases(uint32_t U) const {
- return AliasInfos[U].Regs;
- }
+ const BitVector &getUnitAliases(uint32_t U) const {
+ return AliasInfos[U].Regs;
+ }
- RegisterRef mapTo(RegisterRef RR, unsigned R) const;
- const TargetRegisterInfo &getTRI() const { return TRI; }
+ RegisterRef mapTo(RegisterRef RR, unsigned R) const;
+ const TargetRegisterInfo &getTRI() const { return TRI; }
- private:
- struct RegInfo {
- const TargetRegisterClass *RegClass = nullptr;
- };
- struct UnitInfo {
- RegisterId Reg = 0;
- LaneBitmask Mask;
- };
- struct MaskInfo {
- BitVector Units;
- };
- struct AliasInfo {
- BitVector Regs;
- };
-
- const TargetRegisterInfo &TRI;
- IndexedSet<const uint32_t*> RegMasks;
- std::vector<RegInfo> RegInfos;
- std::vector<UnitInfo> UnitInfos;
- std::vector<MaskInfo> MaskInfos;
- std::vector<AliasInfo> AliasInfos;
-
- bool aliasRR(RegisterRef RA, RegisterRef RB) const;
- bool aliasRM(RegisterRef RR, RegisterRef RM) const;
- bool aliasMM(RegisterRef RM, RegisterRef RN) const;
+private:
+ struct RegInfo {
+ const TargetRegisterClass *RegClass = nullptr;
+ };
+ struct UnitInfo {
+ RegisterId Reg = 0;
+ LaneBitmask Mask;
+ };
+ struct MaskInfo {
+ BitVector Units;
+ };
+ struct AliasInfo {
+ BitVector Regs;
};
- struct RegisterAggr {
- RegisterAggr(const PhysicalRegisterInfo &pri)
- : Units(pri.getTRI().getNumRegUnits()), PRI(pri) {}
- RegisterAggr(const RegisterAggr &RG) = default;
-
- unsigned count() const { return Units.count(); }
- bool empty() const { return Units.none(); }
- bool hasAliasOf(RegisterRef RR) const;
- bool hasCoverOf(RegisterRef RR) const;
+ const TargetRegisterInfo &TRI;
+ IndexedSet<const uint32_t *> RegMasks;
+ std::vector<RegInfo> RegInfos;
+ std::vector<UnitInfo> UnitInfos;
+ std::vector<MaskInfo> MaskInfos;
+ std::vector<AliasInfo> AliasInfos;
- bool operator==(const RegisterAggr &A) const {
- return DenseMapInfo<BitVector>::isEqual(Units, A.Units);
- }
+ bool aliasRR(RegisterRef RA, RegisterRef RB) const;
+ bool aliasRM(RegisterRef RR, RegisterRef RM) const;
+ bool aliasMM(RegisterRef RM, RegisterRef RN) const;
+};
- static bool isCoverOf(RegisterRef RA, RegisterRef RB,
- const PhysicalRegisterInfo &PRI) {
- return RegisterAggr(PRI).insert(RA).hasCoverOf(RB);
- }
+struct RegisterAggr {
+ RegisterAggr(const PhysicalRegisterInfo &pri)
+ : Units(pri.getTRI().getNumRegUnits()), PRI(pri) {}
+ RegisterAggr(const RegisterAggr &RG) = default;
- RegisterAggr &insert(RegisterRef RR);
- RegisterAggr &insert(const RegisterAggr &RG);
- RegisterAggr &intersect(RegisterRef RR);
- RegisterAggr &intersect(const RegisterAggr &RG);
- RegisterAggr &clear(RegisterRef RR);
- RegisterAggr &clear(const RegisterAggr &RG);
+ unsigned count() const { return Units.count(); }
+ bool empty() const { return Units.none(); }
+ bool hasAliasOf(RegisterRef RR) const;
+ bool hasCoverOf(RegisterRef RR) const;
- RegisterRef intersectWith(RegisterRef RR) const;
- RegisterRef clearIn(RegisterRef RR) const;
- RegisterRef makeRegRef() const;
+ bool operator==(const RegisterAggr &A) const {
+ return DenseMapInfo<BitVector>::isEqual(Units, A.Units);
+ }
- size_t hash() const {
- return DenseMapInfo<BitVector>::getHashValue(Units);
- }
+ static bool isCoverOf(RegisterRef RA, RegisterRef RB,
+ const PhysicalRegisterInfo &PRI) {
+ return RegisterAggr(PRI).insert(RA).hasCoverOf(RB);
+ }
- void print(raw_ostream &OS) const;
+ RegisterAggr &insert(RegisterRef RR);
+ RegisterAggr &insert(const RegisterAggr &RG);
+ RegisterAggr &intersect(RegisterRef RR);
+ RegisterAggr &intersect(const RegisterAggr &RG);
+ RegisterAggr &clear(RegisterRef RR);
+ RegisterAggr &clear(const RegisterAggr &RG);
- struct rr_iterator {
- using MapType = std::map<RegisterId, LaneBitmask>;
+ RegisterRef intersectWith(RegisterRef RR) const;
+ RegisterRef clearIn(RegisterRef RR) const;
+ RegisterRef makeRegRef() const;
- private:
- MapType Masks;
- MapType::iterator Pos;
- unsigned Index;
- const RegisterAggr *Owner;
+ size_t hash() const { return DenseMapInfo<BitVector>::getHashValue(Units); }
- public:
- rr_iterator(const RegisterAggr &RG, bool End);
+ void print(raw_ostream &OS) const;
- RegisterRef operator*() const {
- return RegisterRef(Pos->first, Pos->second);
- }
+ struct rr_iterator {
+ using MapType = std::map<RegisterId, LaneBitmask>;
- rr_iterator &operator++() {
- ++Pos;
- ++Index;
- return *this;
- }
+ private:
+ MapType Masks;
+ MapType::iterator Pos;
+ unsigned Index;
+ const RegisterAggr *Owner;
- bool operator==(const rr_iterator &I) const {
- assert(Owner == I.Owner);
- (void)Owner;
- return Index == I.Index;
- }
+ public:
+ rr_iterator(const RegisterAggr &RG, bool End);
- bool operator!=(const rr_iterator &I) const {
- return !(*this == I);
- }
- };
+ RegisterRef operator*() const {
+ return RegisterRef(Pos->first, Pos->second);
+ }
- rr_iterator rr_begin() const {
- return rr_iterator(*this, false);
+ rr_iterator &operator++() {
+ ++Pos;
+ ++Index;
+ return *this;
}
- rr_iterator rr_end() const {
- return rr_iterator(*this, true);
+
+ bool operator==(const rr_iterator &I) const {
+ assert(Owner == I.Owner);
+ (void)Owner;
+ return Index == I.Index;
}
- private:
- BitVector Units;
- const PhysicalRegisterInfo &PRI;
+ bool operator!=(const rr_iterator &I) const { return !(*this == I); }
};
- // Optionally print the lane mask, if it is not ~0.
- struct PrintLaneMaskOpt {
- PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {}
- LaneBitmask Mask;
- };
- raw_ostream &operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P);
+ rr_iterator rr_begin() const { return rr_iterator(*this, false); }
+ rr_iterator rr_end() const { return rr_iterator(*this, true); }
+
+private:
+ BitVector Units;
+ const PhysicalRegisterInfo &PRI;
+};
+
+// Optionally print the lane mask, if it is not ~0.
+struct PrintLaneMaskOpt {
+ PrintLaneMaskOpt(LaneBitmask M) : Mask(M) {}
+ LaneBitmask Mask;
+};
+raw_ostream &operator<<(raw_ostream &OS, const PrintLaneMaskOpt &P);
- raw_ostream &operator<< (raw_ostream &OS, const RegisterAggr &A);
+raw_ostream &operator<<(raw_ostream &OS, const RegisterAggr &A);
} // end namespace rdf
} // end namespace llvm
namespace std {
- template <> struct hash<llvm::rdf::RegisterRef> {
- size_t operator()(llvm::rdf::RegisterRef A) const {
- return A.hash();
- }
- };
- template <> struct hash<llvm::rdf::RegisterAggr> {
- size_t operator()(const llvm::rdf::RegisterAggr &A) const {
- return A.hash();
- }
- };
- template <> struct equal_to<llvm::rdf::RegisterAggr> {
- bool operator()(const llvm::rdf::RegisterAggr &A,
- const llvm::rdf::RegisterAggr &B) const {
- return A == B;
- }
- };
-}
+template <> struct hash<llvm::rdf::RegisterRef> {
+ size_t operator()(llvm::rdf::RegisterRef A) const { //
+ return A.hash();
+ }
+};
+template <> struct hash<llvm::rdf::RegisterAggr> {
+ size_t operator()(const llvm::rdf::RegisterAggr &A) const { //
+ return A.hash();
+ }
+};
+template <> struct equal_to<llvm::rdf::RegisterAggr> {
+ bool operator()(const llvm::rdf::RegisterAggr &A,
+ const llvm::rdf::RegisterAggr &B) const {
+ return A == B;
+ }
+};
+} // namespace std
#endif // LLVM_CODEGEN_RDFREGISTERS_H
diff --git a/llvm/lib/CodeGen/RDFGraph.cpp b/llvm/lib/CodeGen/RDFGraph.cpp
index a7440ce0301e2..46de878c442b6 100644
--- a/llvm/lib/CodeGen/RDFGraph.cpp
+++ b/llvm/lib/CodeGen/RDFGraph.cpp
@@ -8,7 +8,6 @@
//
// Target-independent, SSA-based data flow graph for register data flow (RDF).
//
-#include "llvm/CodeGen/RDFGraph.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetVector.h"
@@ -19,6 +18,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RDFGraph.h"
#include "llvm/CodeGen/RDFRegisters.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
@@ -46,13 +46,13 @@ using namespace rdf;
namespace llvm {
namespace rdf {
-raw_ostream &operator<< (raw_ostream &OS, const PrintLaneMaskOpt &P) {
+raw_ostream &operator<<(raw_ostream &OS, const PrintLaneMaskOpt &P) {
if (!P.Mask.all())
OS << ':' << PrintLaneMask(P.Mask);
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterRef> &P) {
auto &TRI = P.G.getTRI();
if (P.Obj.Reg > 0 && P.Obj.Reg < TRI.getNumRegs())
OS << TRI.getName(P.Obj.Reg);
@@ -62,40 +62,58 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterRef> &P) {
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) {
- auto NA = P.G.addr<NodeBase*>(P.Obj);
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeId> &P) {
+ auto NA = P.G.addr<NodeBase *>(P.Obj);
uint16_t Attrs = NA.Addr->getAttrs();
uint16_t Kind = NodeAttrs::kind(Attrs);
uint16_t Flags = NodeAttrs::flags(Attrs);
switch (NodeAttrs::type(Attrs)) {
- case NodeAttrs::Code:
- switch (Kind) {
- case NodeAttrs::Func: OS << 'f'; break;
- case NodeAttrs::Block: OS << 'b'; break;
- case NodeAttrs::Stmt: OS << 's'; break;
- case NodeAttrs::Phi: OS << 'p'; break;
- default: OS << "c?"; break;
- }
+ case NodeAttrs::Code:
+ switch (Kind) {
+ case NodeAttrs::Func:
+ OS << 'f';
break;
- case NodeAttrs::Ref:
- if (Flags & NodeAttrs::Undef)
- OS << '/';
- if (Flags & NodeAttrs::Dead)
- OS << '\\';
- if (Flags & NodeAttrs::Preserving)
- OS << '+';
- if (Flags & NodeAttrs::Clobbering)
- OS << '~';
- switch (Kind) {
- case NodeAttrs::Use: OS << 'u'; break;
- case NodeAttrs::Def: OS << 'd'; break;
- case NodeAttrs::Block: OS << 'b'; break;
- default: OS << "r?"; break;
- }
+ case NodeAttrs::Block:
+ OS << 'b';
+ break;
+ case NodeAttrs::Stmt:
+ OS << 's';
+ break;
+ case NodeAttrs::Phi:
+ OS << 'p';
+ break;
+ default:
+ OS << "c?";
+ break;
+ }
+ break;
+ case NodeAttrs::Ref:
+ if (Flags & NodeAttrs::Undef)
+ OS << '/';
+ if (Flags & NodeAttrs::Dead)
+ OS << '\\';
+ if (Flags & NodeAttrs::Preserving)
+ OS << '+';
+ if (Flags & NodeAttrs::Clobbering)
+ OS << '~';
+ switch (Kind) {
+ case NodeAttrs::Use:
+ OS << 'u';
+ break;
+ case NodeAttrs::Def:
+ OS << 'd';
+ break;
+ case NodeAttrs::Block:
+ OS << 'b';
break;
default:
- OS << '?';
+ OS << "r?";
break;
+ }
+ break;
+ default:
+ OS << '?';
+ break;
}
OS << P.Obj;
if (Flags & NodeAttrs::Shadow)
@@ -103,15 +121,14 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeId> &P) {
return OS;
}
-static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode*> RA,
- const DataFlowGraph &G) {
- OS << Print(RA.Id, G) << '<'
- << Print(RA.Addr->getRegRef(G), G) << '>';
+static void printRefHeader(raw_ostream &OS, const NodeAddr<RefNode *> RA,
+ const DataFlowGraph &G) {
+ OS << Print(RA.Id, G) << '<' << Print(RA.Addr->getRegRef(G), G) << '>';
if (RA.Addr->getFlags() & NodeAttrs::Fixed)
OS << '!';
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<DefNode *>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
@@ -128,7 +145,7 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<DefNode*>> &P) {
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<UseNode *>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
@@ -139,8 +156,8 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<UseNode*>> &P) {
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const Print<NodeAddr<PhiUseNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<NodeAddr<PhiUseNode *>> &P) {
printRefHeader(OS, P.Obj, P.G);
OS << '(';
if (NodeId N = P.Obj.Addr->getReachingDef())
@@ -154,22 +171,22 @@ raw_ostream &operator<< (raw_ostream &OS,
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<RefNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<RefNode *>> &P) {
switch (P.Obj.Addr->getKind()) {
- case NodeAttrs::Def:
- OS << PrintNode<DefNode*>(P.Obj, P.G);
- break;
- case NodeAttrs::Use:
- if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef)
- OS << PrintNode<PhiUseNode*>(P.Obj, P.G);
- else
- OS << PrintNode<UseNode*>(P.Obj, P.G);
- break;
+ case NodeAttrs::Def:
+ OS << PrintNode<DefNode *>(P.Obj, P.G);
+ break;
+ case NodeAttrs::Use:
+ if (P.Obj.Addr->getFlags() & NodeAttrs::PhiRef)
+ OS << PrintNode<PhiUseNode *>(P.Obj, P.G);
+ else
+ OS << PrintNode<UseNode *>(P.Obj, P.G);
+ break;
}
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeList> &P) {
unsigned N = P.Obj.size();
for (auto I : P.Obj) {
OS << Print(I.Id, P.G);
@@ -179,7 +196,7 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeList> &P) {
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeSet> &P) {
unsigned N = P.Obj.size();
for (auto I : P.Obj) {
OS << Print(I, P.G);
@@ -191,31 +208,30 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<NodeSet> &P) {
namespace {
- template <typename T>
- struct PrintListV {
- PrintListV(const NodeList &L, const DataFlowGraph &G) : List(L), G(G) {}
+template <typename T> struct PrintListV {
+ PrintListV(const NodeList &L, const DataFlowGraph &G) : List(L), G(G) {}
- using Type = T;
- const NodeList &List;
- const DataFlowGraph &G;
- };
+ using Type = T;
+ const NodeList &List;
+ const DataFlowGraph &G;
+};
- template <typename T>
- raw_ostream &operator<< (raw_ostream &OS, const PrintListV<T> &P) {
- unsigned N = P.List.size();
- for (NodeAddr<T> A : P.List) {
- OS << PrintNode<T>(A, P.G);
- if (--N)
- OS << ", ";
- }
- return OS;
+template <typename T>
+raw_ostream &operator<<(raw_ostream &OS, const PrintListV<T> &P) {
+ unsigned N = P.List.size();
+ for (NodeAddr<T> A : P.List) {
+ OS << PrintNode<T>(A, P.G);
+ if (--N)
+ OS << ", ";
}
+ return OS;
+}
} // end anonymous namespace
-raw_ostream &operator<< (raw_ostream &OS, const Print<NodeAddr<PhiNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<PhiNode *>> &P) {
OS << Print(P.Obj.Id, P.G) << ": phi ["
- << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
+ << PrintListV<RefNode *>(P.Obj.Addr->members(P.G), P.G) << ']';
return OS;
}
@@ -226,10 +242,9 @@ raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P) {
// Print the target for calls and branches (for readability).
if (MI.isCall() || MI.isBranch()) {
MachineInstr::const_mop_iterator T =
- llvm::find_if(MI.operands(),
- [] (const MachineOperand &Op) -> bool {
- return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
- });
+ llvm::find_if(MI.operands(), [](const MachineOperand &Op) -> bool {
+ return Op.isMBB() || Op.isGlobal() || Op.isSymbol();
+ });
if (T != MI.operands_end()) {
OS << ' ';
if (T->isMBB())
@@ -240,32 +255,32 @@ raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<StmtNode *>> &P) {
OS << T->getSymbolName();
}
}
- OS << " [" << PrintListV<RefNode*>(P.Obj.Addr->members(P.G), P.G) << ']';
+ OS << " [" << PrintListV<RefNode *>(P.Obj.Addr->members(P.G), P.G) << ']';
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const Print<NodeAddr<InstrNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<NodeAddr<InstrNode *>> &P) {
switch (P.Obj.Addr->getKind()) {
- case NodeAttrs::Phi:
- OS << PrintNode<PhiNode*>(P.Obj, P.G);
- break;
- case NodeAttrs::Stmt:
- OS << PrintNode<StmtNode*>(P.Obj, P.G);
- break;
- default:
- OS << "instr? " << Print(P.Obj.Id, P.G);
- break;
+ case NodeAttrs::Phi:
+ OS << PrintNode<PhiNode *>(P.Obj, P.G);
+ break;
+ case NodeAttrs::Stmt:
+ OS << PrintNode<StmtNode *>(P.Obj, P.G);
+ break;
+ default:
+ OS << "instr? " << Print(P.Obj.Id, P.G);
+ break;
}
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const Print<NodeAddr<BlockNode*>> &P) {
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<NodeAddr<BlockNode *>> &P) {
MachineBasicBlock *BB = P.Obj.Addr->getCode();
unsigned NP = BB->pred_size();
std::vector<int> Ns;
- auto PrintBBs = [&OS] (std::vector<int> Ns) -> void {
+ auto PrintBBs = [&OS](std::vector<int> Ns) -> void {
unsigned N = Ns.size();
for (int I : Ns) {
OS << "%bb." << I;
@@ -289,20 +304,21 @@ raw_ostream &operator<< (raw_ostream &OS,
OS << '\n';
for (auto I : P.Obj.Addr->members(P.G))
- OS << PrintNode<InstrNode*>(I, P.G) << '\n';
+ OS << PrintNode<InstrNode *>(I, P.G) << '\n';
return OS;
}
raw_ostream &operator<<(raw_ostream &OS, const Print<NodeAddr<FuncNode *>> &P) {
- OS << "DFG dump:[\n" << Print(P.Obj.Id, P.G) << ": Function: "
- << P.Obj.Addr->getCode()->getName() << '\n';
+ OS << "DFG dump:[\n"
+ << Print(P.Obj.Id, P.G)
+ << ": Function: " << P.Obj.Addr->getCode()->getName() << '\n';
for (auto I : P.Obj.Addr->members(P.G))
- OS << PrintNode<BlockNode*>(I, P.G) << '\n';
+ OS << PrintNode<BlockNode *>(I, P.G) << '\n';
OS << "]\n";
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterSet> &P) {
OS << '{';
for (auto I : P.Obj)
OS << ' ' << Print(I, P.G);
@@ -310,16 +326,16 @@ raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterSet> &P) {
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS, const Print<RegisterAggr> &P) {
+raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterAggr> &P) {
P.Obj.print(OS);
return OS;
}
-raw_ostream &operator<< (raw_ostream &OS,
- const Print<DataFlowGraph::DefStack> &P) {
- for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E; ) {
- OS << Print(I->Id, P.G)
- << '<' << Print(I->Addr->getRegRef(P.G), P.G) << '>';
+raw_ostream &operator<<(raw_ostream &OS,
+ const Print<DataFlowGraph::DefStack> &P) {
+ for (auto I = P.Obj.top(), E = P.Obj.bottom(); I != E;) {
+ OS << Print(I->Id, P.G) << '<' << Print(I->Addr->getRegRef(P.G), P.G)
+ << '>';
I.down();
if (I != E)
OS << ' ';
@@ -340,13 +356,13 @@ raw_ostream &operator<< (raw_ostream &OS,
// and within that block is described in the header file.
//
void NodeAllocator::startNewBlock() {
- void *T = MemPool.Allocate(NodesPerBlock*NodeMemSize, NodeMemSize);
- char *P = static_cast<char*>(T);
+ void *T = MemPool.Allocate(NodesPerBlock * NodeMemSize, NodeMemSize);
+ char *P = static_cast<char *>(T);
Blocks.push_back(P);
// Check if the block index is still within the allowed range, i.e. less
// than 2^N, where N is the number of bits in NodeId for the block index.
// BitsPerIndex is the number of bits per node index.
- assert((Blocks.size() < ((size_t)1 << (8*sizeof(NodeId)-BitsPerIndex))) &&
+ assert((Blocks.size() < ((size_t)1 << (8 * sizeof(NodeId) - BitsPerIndex))) &&
"Out of bits for block index");
ActiveEnd = P;
}
@@ -356,18 +372,18 @@ bool NodeAllocator::needNewBlock() {
return true;
char *ActiveBegin = Blocks.back();
- uint32_t Index = (ActiveEnd-ActiveBegin)/NodeMemSize;
+ uint32_t Index = (ActiveEnd - ActiveBegin) / NodeMemSize;
return Index >= NodesPerBlock;
}
-NodeAddr<NodeBase*> NodeAllocator::New() {
+NodeAddr<NodeBase *> NodeAllocator::New() {
if (needNewBlock())
startNewBlock();
- uint32_t ActiveB = Blocks.size()-1;
- uint32_t Index = (ActiveEnd - Blocks[ActiveB])/NodeMemSize;
- NodeAddr<NodeBase*> NA = { reinterpret_cast<NodeBase*>(ActiveEnd),
- makeId(ActiveB, Index) };
+ uint32_t ActiveB = Blocks.size() - 1;
+ uint32_t Index = (ActiveEnd - Blocks[ActiveB]) / NodeMemSize;
+ NodeAddr<NodeBase *> NA = {reinterpret_cast<NodeBase *>(ActiveEnd),
+ makeId(ActiveB, Index)};
ActiveEnd += NodeMemSize;
return NA;
}
@@ -376,9 +392,9 @@ NodeId NodeAllocator::id(const NodeBase *P) const {
uintptr_t A = reinterpret_cast<uintptr_t>(P);
for (unsigned i = 0, n = Blocks.size(); i != n; ++i) {
uintptr_t B = reinterpret_cast<uintptr_t>(Blocks[i]);
- if (A < B || A >= B + NodesPerBlock*NodeMemSize)
+ if (A < B || A >= B + NodesPerBlock * NodeMemSize)
continue;
- uint32_t Idx = (A-B)/NodeMemSize;
+ uint32_t Idx = (A - B) / NodeMemSize;
return makeId(i, Idx);
}
llvm_unreachable("Invalid node address");
@@ -391,7 +407,7 @@ void NodeAllocator::clear() {
}
// Insert node NA after "this" in the circular chain.
-void NodeBase::append(NodeAddr<NodeBase*> NA) {
+void NodeBase::append(NodeAddr<NodeBase *> NA) {
NodeId Nx = Next;
// If NA is already "next", do nothing.
if (Next != NA.Id) {
@@ -429,48 +445,48 @@ void RefNode::setRegRef(MachineOperand *Op, DataFlowGraph &G) {
}
// Get the owner of a given reference node.
-NodeAddr<NodeBase*> RefNode::getOwner(const DataFlowGraph &G) {
- NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
+NodeAddr<NodeBase *> RefNode::getOwner(const DataFlowGraph &G) {
+ NodeAddr<NodeBase *> NA = G.addr<NodeBase *>(getNext());
while (NA.Addr != this) {
if (NA.Addr->getType() == NodeAttrs::Code)
return NA;
- NA = G.addr<NodeBase*>(NA.Addr->getNext());
+ NA = G.addr<NodeBase *>(NA.Addr->getNext());
}
llvm_unreachable("No owner in circular list");
}
// Connect the def node to the reaching def node.
-void DefNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
+void DefNode::linkToDef(NodeId Self, NodeAddr<DefNode *> DA) {
Ref.RD = DA.Id;
Ref.Sib = DA.Addr->getReachedDef();
DA.Addr->setReachedDef(Self);
}
// Connect the use node to the reaching def node.
-void UseNode::linkToDef(NodeId Self, NodeAddr<DefNode*> DA) {
+void UseNode::linkToDef(NodeId Self, NodeAddr<DefNode *> DA) {
Ref.RD = DA.Id;
Ref.Sib = DA.Addr->getReachedUse();
DA.Addr->setReachedUse(Self);
}
// Get the first member of the code node.
-NodeAddr<NodeBase*> CodeNode::getFirstMember(const DataFlowGraph &G) const {
+NodeAddr<NodeBase *> CodeNode::getFirstMember(const DataFlowGraph &G) const {
if (Code.FirstM == 0)
- return NodeAddr<NodeBase*>();
- return G.addr<NodeBase*>(Code.FirstM);
+ return NodeAddr<NodeBase *>();
+ return G.addr<NodeBase *>(Code.FirstM);
}
// Get the last member of the code node.
-NodeAddr<NodeBase*> CodeNode::getLastMember(const DataFlowGraph &G) const {
+NodeAddr<NodeBase *> CodeNode::getLastMember(const DataFlowGraph &G) const {
if (Code.LastM == 0)
- return NodeAddr<NodeBase*>();
- return G.addr<NodeBase*>(Code.LastM);
+ return NodeAddr<NodeBase *>();
+ return G.addr<NodeBase *>(Code.LastM);
}
// Add node NA at the end of the member list of the given code node.
-void CodeNode::addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
- NodeAddr<NodeBase*> ML = getLastMember(G);
+void CodeNode::addMember(NodeAddr<NodeBase *> NA, const DataFlowGraph &G) {
+ NodeAddr<NodeBase *> ML = getLastMember(G);
if (ML.Id != 0) {
ML.Addr->append(NA);
} else {
@@ -482,16 +498,16 @@ void CodeNode::addMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
}
// Add node NA after member node MA in the given code node.
-void CodeNode::addMemberAfter(NodeAddr<NodeBase*> MA, NodeAddr<NodeBase*> NA,
- const DataFlowGraph &G) {
+void CodeNode::addMemberAfter(NodeAddr<NodeBase *> MA, NodeAddr<NodeBase *> NA,
+ const DataFlowGraph &G) {
MA.Addr->append(NA);
if (Code.LastM == MA.Id)
Code.LastM = NA.Id;
}
// Remove member node NA from the given code node.
-void CodeNode::removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
- NodeAddr<NodeBase*> MA = getFirstMember(G);
+void CodeNode::removeMember(NodeAddr<NodeBase *> NA, const DataFlowGraph &G) {
+ NodeAddr<NodeBase *> MA = getFirstMember(G);
assert(MA.Id != 0);
// Special handling if the member to remove is the first member.
@@ -516,33 +532,33 @@ void CodeNode::removeMember(NodeAddr<NodeBase*> NA, const DataFlowGraph &G) {
Code.LastM = MA.Id;
return;
}
- MA = G.addr<NodeBase*>(MX);
+ MA = G.addr<NodeBase *>(MX);
}
llvm_unreachable("No such member");
}
// Return the list of all members of the code node.
NodeList CodeNode::members(const DataFlowGraph &G) const {
- static auto True = [] (NodeAddr<NodeBase*>) -> bool { return true; };
+ static auto True = [](NodeAddr<NodeBase *>) -> bool { return true; };
return members_if(True, G);
}
// Return the owner of the given instr node.
-NodeAddr<NodeBase*> InstrNode::getOwner(const DataFlowGraph &G) {
- NodeAddr<NodeBase*> NA = G.addr<NodeBase*>(getNext());
+NodeAddr<NodeBase *> InstrNode::getOwner(const DataFlowGraph &G) {
+ NodeAddr<NodeBase *> NA = G.addr<NodeBase *>(getNext());
while (NA.Addr != this) {
assert(NA.Addr->getType() == NodeAttrs::Code);
if (NA.Addr->getKind() == NodeAttrs::Block)
return NA;
- NA = G.addr<NodeBase*>(NA.Addr->getNext());
+ NA = G.addr<NodeBase *>(NA.Addr->getNext());
}
llvm_unreachable("No owner in circular list");
}
// Add the phi node PA to the given block node.
-void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
- NodeAddr<NodeBase*> M = getFirstMember(G);
+void BlockNode::addPhi(NodeAddr<PhiNode *> PA, const DataFlowGraph &G) {
+ NodeAddr<NodeBase *> M = getFirstMember(G);
if (M.Id == 0) {
addMember(PA, G);
return;
@@ -557,10 +573,10 @@ void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
} else {
// If the first member is a phi, find the last phi, and append PA to it.
assert(M.Addr->getKind() == NodeAttrs::Phi);
- NodeAddr<NodeBase*> MN = M;
+ NodeAddr<NodeBase *> MN = M;
do {
M = MN;
- MN = G.addr<NodeBase*>(M.Addr->getNext());
+ MN = G.addr<NodeBase *>(M.Addr->getNext());
assert(MN.Addr->getType() == NodeAttrs::Code);
} while (MN.Addr->getKind() == NodeAttrs::Phi);
@@ -571,19 +587,19 @@ void BlockNode::addPhi(NodeAddr<PhiNode*> PA, const DataFlowGraph &G) {
// Find the block node corresponding to the machine basic block BB in the
// given func node.
-NodeAddr<BlockNode*> FuncNode::findBlock(const MachineBasicBlock *BB,
- const DataFlowGraph &G) const {
- auto EqBB = [BB] (NodeAddr<NodeBase*> NA) -> bool {
- return NodeAddr<BlockNode*>(NA).Addr->getCode() == BB;
+NodeAddr<BlockNode *> FuncNode::findBlock(const MachineBasicBlock *BB,
+ const DataFlowGraph &G) const {
+ auto EqBB = [BB](NodeAddr<NodeBase *> NA) -> bool {
+ return NodeAddr<BlockNode *>(NA).Addr->getCode() == BB;
};
NodeList Ms = members_if(EqBB, G);
if (!Ms.empty())
return Ms[0];
- return NodeAddr<BlockNode*>();
+ return NodeAddr<BlockNode *>();
}
// Get the block node for the entry block in the given function.
-NodeAddr<BlockNode*> FuncNode::getEntryBlock(const DataFlowGraph &G) {
+NodeAddr<BlockNode *> FuncNode::getEntryBlock(const DataFlowGraph &G) {
MachineBasicBlock *EntryB = &getCode()->front();
return findBlock(EntryB, G);
}
@@ -593,14 +609,14 @@ NodeAddr<BlockNode*> FuncNode::getEntryBlock(const DataFlowGraph &G) {
// For a given instruction, check if there are any bits of RR that can remain
// unchanged across this def.
-bool TargetOperandInfo::isPreserving(const MachineInstr &In, unsigned OpNum)
- const {
+bool TargetOperandInfo::isPreserving(const MachineInstr &In,
+ unsigned OpNum) const {
return TII.isPredicated(In);
}
// Check if the definition of RR produces an unspecified value.
-bool TargetOperandInfo::isClobbering(const MachineInstr &In, unsigned OpNum)
- const {
+bool TargetOperandInfo::isClobbering(const MachineInstr &In,
+ unsigned OpNum) const {
const MachineOperand &Op = In.getOperand(OpNum);
if (Op.isRegMask())
return true;
@@ -612,8 +628,8 @@ bool TargetOperandInfo::isClobbering(const MachineInstr &In, unsigned OpNum)
}
// Check if the given instruction specifically requires
-bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum)
- const {
+bool TargetOperandInfo::isFixedReg(const MachineInstr &In,
+ unsigned OpNum) const {
if (In.isCall() || In.isReturn() || In.isInlineAsm())
return true;
// Check for a tail call.
@@ -642,19 +658,20 @@ bool TargetOperandInfo::isFixedReg(const MachineInstr &In, unsigned OpNum)
//
DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
- const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
- const MachineDominanceFrontier &mdf)
+ const TargetRegisterInfo &tri,
+ const MachineDominatorTree &mdt,
+ const MachineDominanceFrontier &mdf)
: DefaultTOI(std::make_unique<TargetOperandInfo>(tii)), MF(mf), TII(tii),
TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(*DefaultTOI),
- LiveIns(PRI) {
-}
+ LiveIns(PRI) {}
DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
- const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
- const MachineDominanceFrontier &mdf, const TargetOperandInfo &toi)
+ const TargetRegisterInfo &tri,
+ const MachineDominatorTree &mdt,
+ const MachineDominanceFrontier &mdf,
+ const TargetOperandInfo &toi)
: MF(mf), TII(tii), TRI(tri), PRI(tri, mf), MDT(mdt), MDF(mdf), TOI(toi),
- LiveIns(PRI) {
-}
+ LiveIns(PRI) {}
// The implementation of the definition stack.
// Each register reference has its own definition stack. In particular,
@@ -663,7 +680,8 @@ DataFlowGraph::DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
// Construct a stack iterator.
DataFlowGraph::DefStack::Iterator::Iterator(const DataFlowGraph::DefStack &S,
- bool Top) : DS(S) {
+ bool Top)
+ : DS(S) {
if (!Top) {
// Initialize to bottom.
Pos = 0;
@@ -671,7 +689,7 @@ DataFlowGraph::DefStack::Iterator::Iterator(const DataFlowGraph::DefStack &S,
}
// Initialize to the top, i.e. top-most non-delimiter (or 0, if empty).
Pos = DS.Stack.size();
- while (Pos > 0 && DS.isDelimiter(DS.Stack[Pos-1]))
+ while (Pos > 0 && DS.isDelimiter(DS.Stack[Pos - 1]))
Pos--;
}
@@ -695,7 +713,7 @@ void DataFlowGraph::DefStack::pop() {
// Push a delimiter for block node N on the stack.
void DataFlowGraph::DefStack::start_block(NodeId N) {
assert(N != 0);
- Stack.push_back(NodeAddr<DefNode*>(nullptr, N));
+ Stack.push_back(NodeAddr<DefNode *>(nullptr, N));
}
// Remove all nodes from the top of the stack, until the delimited for
@@ -705,7 +723,7 @@ void DataFlowGraph::DefStack::clear_block(NodeId N) {
assert(N != 0);
unsigned P = Stack.size();
while (P > 0) {
- bool Found = isDelimiter(Stack[P-1], N);
+ bool Found = isDelimiter(Stack[P - 1], N);
P--;
if (Found)
break;
@@ -723,7 +741,7 @@ unsigned DataFlowGraph::DefStack::nextUp(unsigned P) const {
assert(P < SS);
do {
P++;
- IsDelim = isDelimiter(Stack[P-1]);
+ IsDelim = isDelimiter(Stack[P - 1]);
} while (P < SS && IsDelim);
assert(!IsDelim);
return P;
@@ -734,11 +752,11 @@ unsigned DataFlowGraph::DefStack::nextDown(unsigned P) const {
// Get the preceding valid position before P (skipping all delimiters).
// The input position P does not have to point to a non-delimiter.
assert(P > 0 && P <= Stack.size());
- bool IsDelim = isDelimiter(Stack[P-1]);
+ bool IsDelim = isDelimiter(Stack[P - 1]);
do {
if (--P == 0)
break;
- IsDelim = isDelimiter(Stack[P-1]);
+ IsDelim = isDelimiter(Stack[P - 1]);
} while (P > 0 && IsDelim);
assert(!IsDelim);
return P;
@@ -749,8 +767,7 @@ unsigned DataFlowGraph::DefStack::nextDown(unsigned P) const {
RegisterSet DataFlowGraph::getLandingPadLiveIns() const {
RegisterSet LR;
const Function &F = MF.getFunction();
- const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn()
- : nullptr;
+ const Constant *PF = F.hasPersonalityFn() ? F.getPersonalityFn() : nullptr;
const TargetLowering &TLI = *MF.getSubtarget().getTargetLowering();
if (RegisterId R = TLI.getExceptionPointerRegister(PF))
LR.insert(RegisterRef(R));
@@ -778,8 +795,8 @@ NodeId DataFlowGraph::id(const NodeBase *P) const {
}
// Allocate a new node and set the attributes to Attrs.
-NodeAddr<NodeBase*> DataFlowGraph::newNode(uint16_t Attrs) {
- NodeAddr<NodeBase*> P = Memory.New();
+NodeAddr<NodeBase *> DataFlowGraph::newNode(uint16_t Attrs) {
+ NodeAddr<NodeBase *> P = Memory.New();
P.Addr->init();
P.Addr->setAttrs(Attrs);
return P;
@@ -787,16 +804,16 @@ NodeAddr<NodeBase*> DataFlowGraph::newNode(uint16_t Attrs) {
// Make a copy of the given node B, except for the data-flow links, which
// are set to 0.
-NodeAddr<NodeBase*> DataFlowGraph::cloneNode(const NodeAddr<NodeBase*> B) {
- NodeAddr<NodeBase*> NA = newNode(0);
+NodeAddr<NodeBase *> DataFlowGraph::cloneNode(const NodeAddr<NodeBase *> B) {
+ NodeAddr<NodeBase *> NA = newNode(0);
memcpy(NA.Addr, B.Addr, sizeof(NodeBase));
// Ref nodes need to have the data-flow links reset.
if (NA.Addr->getType() == NodeAttrs::Ref) {
- NodeAddr<RefNode*> RA = NA;
+ NodeAddr<RefNode *> RA = NA;
RA.Addr->setReachingDef(0);
RA.Addr->setSibling(0);
if (NA.Addr->getKind() == NodeAttrs::Def) {
- NodeAddr<DefNode*> DA = NA;
+ NodeAddr<DefNode *> DA = NA;
DA.Addr->setReachedDef(0);
DA.Addr->setReachedUse(0);
}
@@ -806,61 +823,63 @@ NodeAddr<NodeBase*> DataFlowGraph::cloneNode(const NodeAddr<NodeBase*> B) {
// Allocation routines for specific node types/kinds.
-NodeAddr<UseNode*> DataFlowGraph::newUse(NodeAddr<InstrNode*> Owner,
- MachineOperand &Op, uint16_t Flags) {
- NodeAddr<UseNode*> UA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
+NodeAddr<UseNode *> DataFlowGraph::newUse(NodeAddr<InstrNode *> Owner,
+ MachineOperand &Op, uint16_t Flags) {
+ NodeAddr<UseNode *> UA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
UA.Addr->setRegRef(&Op, *this);
return UA;
}
-NodeAddr<PhiUseNode*> DataFlowGraph::newPhiUse(NodeAddr<PhiNode*> Owner,
- RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) {
- NodeAddr<PhiUseNode*> PUA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
+NodeAddr<PhiUseNode *> DataFlowGraph::newPhiUse(NodeAddr<PhiNode *> Owner,
+ RegisterRef RR,
+ NodeAddr<BlockNode *> PredB,
+ uint16_t Flags) {
+ NodeAddr<PhiUseNode *> PUA = newNode(NodeAttrs::Ref | NodeAttrs::Use | Flags);
assert(Flags & NodeAttrs::PhiRef);
PUA.Addr->setRegRef(RR, *this);
PUA.Addr->setPredecessor(PredB.Id);
return PUA;
}
-NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
- MachineOperand &Op, uint16_t Flags) {
- NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
+NodeAddr<DefNode *> DataFlowGraph::newDef(NodeAddr<InstrNode *> Owner,
+ MachineOperand &Op, uint16_t Flags) {
+ NodeAddr<DefNode *> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
DA.Addr->setRegRef(&Op, *this);
return DA;
}
-NodeAddr<DefNode*> DataFlowGraph::newDef(NodeAddr<InstrNode*> Owner,
- RegisterRef RR, uint16_t Flags) {
- NodeAddr<DefNode*> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
+NodeAddr<DefNode *> DataFlowGraph::newDef(NodeAddr<InstrNode *> Owner,
+ RegisterRef RR, uint16_t Flags) {
+ NodeAddr<DefNode *> DA = newNode(NodeAttrs::Ref | NodeAttrs::Def | Flags);
assert(Flags & NodeAttrs::PhiRef);
DA.Addr->setRegRef(RR, *this);
return DA;
}
-NodeAddr<PhiNode*> DataFlowGraph::newPhi(NodeAddr<BlockNode*> Owner) {
- NodeAddr<PhiNode*> PA = newNode(NodeAttrs::Code | NodeAttrs::Phi);
+NodeAddr<PhiNode *> DataFlowGraph::newPhi(NodeAddr<BlockNode *> Owner) {
+ NodeAddr<PhiNode *> PA = newNode(NodeAttrs::Code | NodeAttrs::Phi);
Owner.Addr->addPhi(PA, *this);
return PA;
}
-NodeAddr<StmtNode*> DataFlowGraph::newStmt(NodeAddr<BlockNode*> Owner,
- MachineInstr *MI) {
- NodeAddr<StmtNode*> SA = newNode(NodeAttrs::Code | NodeAttrs::Stmt);
+NodeAddr<StmtNode *> DataFlowGraph::newStmt(NodeAddr<BlockNode *> Owner,
+ MachineInstr *MI) {
+ NodeAddr<StmtNode *> SA = newNode(NodeAttrs::Code | NodeAttrs::Stmt);
SA.Addr->setCode(MI);
Owner.Addr->addMember(SA, *this);
return SA;
}
-NodeAddr<BlockNode*> DataFlowGraph::newBlock(NodeAddr<FuncNode*> Owner,
- MachineBasicBlock *BB) {
- NodeAddr<BlockNode*> BA = newNode(NodeAttrs::Code | NodeAttrs::Block);
+NodeAddr<BlockNode *> DataFlowGraph::newBlock(NodeAddr<FuncNode *> Owner,
+ MachineBasicBlock *BB) {
+ NodeAddr<BlockNode *> BA = newNode(NodeAttrs::Code | NodeAttrs::Block);
BA.Addr->setCode(BB);
Owner.Addr->addMember(BA, *this);
return BA;
}
-NodeAddr<FuncNode*> DataFlowGraph::newFunc(MachineFunction *MF) {
- NodeAddr<FuncNode*> FA = newNode(NodeAttrs::Code | NodeAttrs::Func);
+NodeAddr<FuncNode *> DataFlowGraph::newFunc(MachineFunction *MF) {
+ NodeAddr<FuncNode *> FA = newNode(NodeAttrs::Code | NodeAttrs::Func);
FA.Addr->setCode(MF);
return FA;
}
@@ -874,7 +893,7 @@ void DataFlowGraph::build(unsigned Options) {
return;
for (MachineBasicBlock &B : MF) {
- NodeAddr<BlockNode*> BA = newBlock(Func, &B);
+ NodeAddr<BlockNode *> BA = newBlock(Func, &B);
BlockNodes.insert(std::make_pair(&B, BA));
for (MachineInstr &I : B) {
if (I.isDebugInstr())
@@ -883,21 +902,21 @@ void DataFlowGraph::build(unsigned Options) {
}
}
- NodeAddr<BlockNode*> EA = Func.Addr->getEntryBlock(*this);
+ NodeAddr<BlockNode *> EA = Func.Addr->getEntryBlock(*this);
NodeList Blocks = Func.Addr->members(*this);
// Collect information about block references.
RegisterSet AllRefs;
- for (NodeAddr<BlockNode*> BA : Blocks)
- for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
- for (NodeAddr<RefNode*> RA : IA.Addr->members(*this))
+ for (NodeAddr<BlockNode *> BA : Blocks)
+ for (NodeAddr<InstrNode *> IA : BA.Addr->members(*this))
+ for (NodeAddr<RefNode *> RA : IA.Addr->members(*this))
AllRefs.insert(RA.Addr->getRegRef(*this));
// Collect function live-ins and entry block live-ins.
MachineRegisterInfo &MRI = MF.getRegInfo();
MachineBasicBlock &EntryB = *EA.Addr->getCode();
assert(EntryB.pred_empty() && "Function entry block has predecessors");
- for (std::pair<unsigned,unsigned> P : MRI.liveins())
+ for (std::pair<unsigned, unsigned> P : MRI.liveins())
LiveIns.insert(RegisterRef(P.first));
if (MRI.tracksLiveness()) {
for (auto I : EntryB.liveins())
@@ -905,12 +924,12 @@ void DataFlowGraph::build(unsigned Options) {
}
// Add function-entry phi nodes for the live-in registers.
- //for (std::pair<RegisterId,LaneBitmask> P : LiveIns) {
+ // for (std::pair<RegisterId,LaneBitmask> P : LiveIns) {
for (auto I = LiveIns.rr_begin(), E = LiveIns.rr_end(); I != E; ++I) {
RegisterRef RR = *I;
- NodeAddr<PhiNode*> PA = newPhi(EA);
+ NodeAddr<PhiNode *> PA = newPhi(EA);
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
- NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
+ NodeAddr<DefNode *> DA = newDef(PA, RR, PhiFlags);
PA.Addr->addMember(DA, *this);
}
@@ -921,7 +940,7 @@ void DataFlowGraph::build(unsigned Options) {
// may define certain registers as defined on entry to such a block.
RegisterSet EHRegs = getLandingPadLiveIns();
if (!EHRegs.empty()) {
- for (NodeAddr<BlockNode*> BA : Blocks) {
+ for (NodeAddr<BlockNode *> BA : Blocks) {
const MachineBasicBlock &B = *BA.Addr->getCode();
if (!B.isEHPad())
continue;
@@ -933,14 +952,14 @@ void DataFlowGraph::build(unsigned Options) {
// Build phi nodes for each live-in.
for (RegisterRef RR : EHRegs) {
- NodeAddr<PhiNode*> PA = newPhi(BA);
+ NodeAddr<PhiNode *> PA = newPhi(BA);
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
// Add def:
- NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
+ NodeAddr<DefNode *> DA = newDef(PA, RR, PhiFlags);
PA.Addr->addMember(DA, *this);
// Add uses (no reaching defs for phi uses):
- for (NodeAddr<BlockNode*> PBA : Preds) {
- NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
+ for (NodeAddr<BlockNode *> PBA : Preds) {
+ NodeAddr<PhiUseNode *> PUA = newPhiUse(PA, RR, PBA);
PA.Addr->addMember(PUA, *this);
}
}
@@ -950,9 +969,9 @@ void DataFlowGraph::build(unsigned Options) {
// Build a map "PhiM" which will contain, for each block, the set
// of references that will require phi definitions in that block.
BlockRefsMap PhiM;
- for (NodeAddr<BlockNode*> BA : Blocks)
+ for (NodeAddr<BlockNode *> BA : Blocks)
recordDefsForDF(PhiM, BA);
- for (NodeAddr<BlockNode*> BA : Blocks)
+ for (NodeAddr<BlockNode *> BA : Blocks)
buildPhis(PhiM, AllRefs, BA);
// Link all the refs. This will recursively traverse the dominator tree.
@@ -1006,14 +1025,14 @@ void DataFlowGraph::releaseBlock(NodeId B, DefStackMap &DefM) {
// Push all definitions from the instruction node IA to an appropriate
// stack in DefM.
-void DataFlowGraph::pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
+void DataFlowGraph::pushAllDefs(NodeAddr<InstrNode *> IA, DefStackMap &DefM) {
pushClobbers(IA, DefM);
pushDefs(IA, DefM);
}
// Push all definitions from the instruction node IA to an appropriate
// stack in DefM.
-void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
+void DataFlowGraph::pushClobbers(NodeAddr<InstrNode *> IA, DefStackMap &DefM) {
NodeSet Visited;
std::set<RegisterId> Defined;
@@ -1029,14 +1048,14 @@ void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
// unspecified order), but the order does not matter from the data-
// -flow perspective.
- for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
+ for (NodeAddr<DefNode *> DA : IA.Addr->members_if(IsDef, *this)) {
if (Visited.count(DA.Id))
continue;
if (!(DA.Addr->getFlags() & NodeAttrs::Clobbering))
continue;
NodeList Rel = getRelatedRefs(IA, DA);
- NodeAddr<DefNode*> PDA = Rel.front();
+ NodeAddr<DefNode *> PDA = Rel.front();
RegisterRef RR = PDA.Addr->getRegRef(*this);
// Push the definition on the stack for the register and all aliases.
@@ -1050,14 +1069,14 @@ void DataFlowGraph::pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
DefM[A].push(DA);
}
// Mark all the related defs as visited.
- for (NodeAddr<NodeBase*> T : Rel)
+ for (NodeAddr<NodeBase *> T : Rel)
Visited.insert(T.Id);
}
}
// Push all definitions from the instruction node IA to an appropriate
// stack in DefM.
-void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
+void DataFlowGraph::pushDefs(NodeAddr<InstrNode *> IA, DefStackMap &DefM) {
NodeSet Visited;
#ifndef NDEBUG
std::set<RegisterId> Defined;
@@ -1075,23 +1094,23 @@ void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
// unspecified order), but the order does not matter from the data-
// -flow perspective.
- for (NodeAddr<DefNode*> DA : IA.Addr->members_if(IsDef, *this)) {
+ for (NodeAddr<DefNode *> DA : IA.Addr->members_if(IsDef, *this)) {
if (Visited.count(DA.Id))
continue;
if (DA.Addr->getFlags() & NodeAttrs::Clobbering)
continue;
NodeList Rel = getRelatedRefs(IA, DA);
- NodeAddr<DefNode*> PDA = Rel.front();
+ NodeAddr<DefNode *> PDA = Rel.front();
RegisterRef RR = PDA.Addr->getRegRef(*this);
#ifndef NDEBUG
// Assert if the register is defined in two or more unrelated defs.
// This could happen if there are two or more def operands defining it.
if (!Defined.insert(RR.Reg).second) {
- MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode();
- dbgs() << "Multiple definitions of register: "
- << Print(RR, *this) << " in\n " << *MI << "in "
- << printMBBReference(*MI->getParent()) << '\n';
+ MachineInstr *MI = NodeAddr<StmtNode *>(IA).Addr->getCode();
+ dbgs() << "Multiple definitions of register: " << Print(RR, *this)
+ << " in\n " << *MI << "in " << printMBBReference(*MI->getParent())
+ << '\n';
llvm_unreachable(nullptr);
}
#endif
@@ -1104,15 +1123,15 @@ void DataFlowGraph::pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DefM) {
DefM[A].push(DA);
}
// Mark all the related defs as visited.
- for (NodeAddr<NodeBase*> T : Rel)
+ for (NodeAddr<NodeBase *> T : Rel)
Visited.insert(T.Id);
}
}
// Return the list of all reference nodes related to RA, including RA itself.
// See "getNextRelated" for the meaning of a "related reference".
-NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const {
+NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const {
assert(IA.Id != 0 && RA.Id != 0);
NodeList Refs;
@@ -1128,7 +1147,7 @@ NodeList DataFlowGraph::getRelatedRefs(NodeAddr<InstrNode*> IA,
void DataFlowGraph::reset() {
Memory.clear();
BlockNodes.clear();
- Func = NodeAddr<FuncNode*>();
+ Func = NodeAddr<FuncNode *>();
}
// Return the next reference node in the instruction node IA that is related
@@ -1137,29 +1156,29 @@ void DataFlowGraph::reset() {
// characteristics. Specific examples of related nodes are shadow reference
// nodes.
// Return the equivalent of nullptr if there are no more related references.
-NodeAddr<RefNode*> DataFlowGraph::getNextRelated(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const {
+NodeAddr<RefNode *>
+DataFlowGraph::getNextRelated(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const {
assert(IA.Id != 0 && RA.Id != 0);
- auto Related = [this,RA](NodeAddr<RefNode*> TA) -> bool {
+ auto Related = [this, RA](NodeAddr<RefNode *> TA) -> bool {
if (TA.Addr->getKind() != RA.Addr->getKind())
return false;
if (TA.Addr->getRegRef(*this) != RA.Addr->getRegRef(*this))
return false;
return true;
};
- auto RelatedStmt = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
- return Related(TA) &&
- &RA.Addr->getOp() == &TA.Addr->getOp();
+ auto RelatedStmt = [&Related, RA](NodeAddr<RefNode *> TA) -> bool {
+ return Related(TA) && &RA.Addr->getOp() == &TA.Addr->getOp();
};
- auto RelatedPhi = [&Related,RA](NodeAddr<RefNode*> TA) -> bool {
+ auto RelatedPhi = [&Related, RA](NodeAddr<RefNode *> TA) -> bool {
if (!Related(TA))
return false;
if (TA.Addr->getKind() != NodeAttrs::Use)
return true;
// For phi uses, compare predecessor blocks.
- const NodeAddr<const PhiUseNode*> TUA = TA;
- const NodeAddr<const PhiUseNode*> RUA = RA;
+ const NodeAddr<const PhiUseNode *> TUA = TA;
+ const NodeAddr<const PhiUseNode *> RUA = RA;
return TUA.Addr->getPredecessor() == RUA.Addr->getPredecessor();
};
@@ -1175,12 +1194,12 @@ NodeAddr<RefNode*> DataFlowGraph::getNextRelated(NodeAddr<InstrNode*> IA,
// first element is the element after which such a node should be inserted,
// and the second element is a null-address.
template <typename Predicate>
-std::pair<NodeAddr<RefNode*>,NodeAddr<RefNode*>>
-DataFlowGraph::locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
- Predicate P) const {
+std::pair<NodeAddr<RefNode *>, NodeAddr<RefNode *>>
+DataFlowGraph::locateNextRef(NodeAddr<InstrNode *> IA, NodeAddr<RefNode *> RA,
+ Predicate P) const {
assert(IA.Id != 0 && RA.Id != 0);
- NodeAddr<RefNode*> NA;
+ NodeAddr<RefNode *> NA;
NodeId Start = RA.Id;
while (true) {
NA = getNextRelated(IA, RA);
@@ -1193,17 +1212,18 @@ DataFlowGraph::locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA,
if (NA.Id != 0 && NA.Id != Start)
return std::make_pair(RA, NA);
- return std::make_pair(RA, NodeAddr<RefNode*>());
+ return std::make_pair(RA, NodeAddr<RefNode *>());
}
// Get the next shadow node in IA corresponding to RA, and optionally create
// such a node if it does not exist.
-NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA, bool Create) {
+NodeAddr<RefNode *> DataFlowGraph::getNextShadow(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA,
+ bool Create) {
assert(IA.Id != 0 && RA.Id != 0);
uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
- auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
+ auto IsShadow = [Flags](NodeAddr<RefNode *> TA) -> bool {
return TA.Addr->getFlags() == Flags;
};
auto Loc = locateNextRef(IA, RA, IsShadow);
@@ -1211,7 +1231,7 @@ NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
return Loc.second;
// Create a copy of RA and mark is as shadow.
- NodeAddr<RefNode*> NA = cloneNode(RA);
+ NodeAddr<RefNode *> NA = cloneNode(RA);
NA.Addr->setFlags(Flags | NodeAttrs::Shadow);
IA.Addr->addMemberAfter(Loc.first, NA, *this);
return NA;
@@ -1219,11 +1239,11 @@ NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
// Get the next shadow node in IA corresponding to RA. Return null-address
// if such a node does not exist.
-NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
- NodeAddr<RefNode*> RA) const {
+NodeAddr<RefNode *> DataFlowGraph::getNextShadow(NodeAddr<InstrNode *> IA,
+ NodeAddr<RefNode *> RA) const {
assert(IA.Id != 0 && RA.Id != 0);
uint16_t Flags = RA.Addr->getFlags() | NodeAttrs::Shadow;
- auto IsShadow = [Flags] (NodeAddr<RefNode*> TA) -> bool {
+ auto IsShadow = [Flags](NodeAddr<RefNode *> TA) -> bool {
return TA.Addr->getFlags() == Flags;
};
return locateNextRef(IA, RA, IsShadow).second;
@@ -1231,10 +1251,10 @@ NodeAddr<RefNode*> DataFlowGraph::getNextShadow(NodeAddr<InstrNode*> IA,
// Create a new statement node in the block node BA that corresponds to
// the machine instruction MI.
-void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
- NodeAddr<StmtNode*> SA = newStmt(BA, &In);
+void DataFlowGraph::buildStmt(NodeAddr<BlockNode *> BA, MachineInstr &In) {
+ NodeAddr<StmtNode *> SA = newStmt(BA, &In);
- auto isCall = [] (const MachineInstr &In) -> bool {
+ auto isCall = [](const MachineInstr &In) -> bool {
if (In.isCall())
return true;
// Is tail call?
@@ -1251,7 +1271,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
return false;
};
- auto isDefUndef = [this] (const MachineInstr &In, RegisterRef DR) -> bool {
+ auto isDefUndef = [this](const MachineInstr &In, RegisterRef DR) -> bool {
// This instruction defines DR. Check if there is a use operand that
// would make DR live on entry to the instruction.
for (const MachineOperand &Op : In.all_uses()) {
@@ -1293,7 +1313,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
Flags |= NodeAttrs::Fixed;
if (IsCall && Op.isDead())
Flags |= NodeAttrs::Dead;
- NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
+ NodeAddr<DefNode *> DA = newDef(SA, Op, Flags);
SA.Addr->addMember(DA, *this);
assert(!DoneDefs.test(R));
DoneDefs.set(R);
@@ -1305,14 +1325,13 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
MachineOperand &Op = In.getOperand(OpN);
if (!Op.isRegMask())
continue;
- uint16_t Flags = NodeAttrs::Clobbering | NodeAttrs::Fixed |
- NodeAttrs::Dead;
- NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
+ uint16_t Flags = NodeAttrs::Clobbering | NodeAttrs::Fixed | NodeAttrs::Dead;
+ NodeAddr<DefNode *> DA = newDef(SA, Op, Flags);
SA.Addr->addMember(DA, *this);
// Record all clobbered registers in DoneDefs.
const uint32_t *RM = Op.getRegMask();
for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i)
- if (!(RM[i/32] & (1u << (i%32))))
+ if (!(RM[i / 32] & (1u << (i % 32))))
DoneClobbers.set(i);
}
@@ -1342,7 +1361,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
continue;
Flags |= NodeAttrs::Dead;
}
- NodeAddr<DefNode*> DA = newDef(SA, Op, Flags);
+ NodeAddr<DefNode *> DA = newDef(SA, Op, Flags);
SA.Addr->addMember(DA, *this);
DoneDefs.set(R);
}
@@ -1359,7 +1378,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
Flags |= NodeAttrs::Undef;
if (TOI.isFixedReg(In, OpN))
Flags |= NodeAttrs::Fixed;
- NodeAddr<UseNode*> UA = newUse(SA, Op, Flags);
+ NodeAddr<UseNode *> UA = newUse(SA, Op, Flags);
SA.Addr->addMember(UA, *this);
}
}
@@ -1367,7 +1386,7 @@ void DataFlowGraph::buildStmt(NodeAddr<BlockNode*> BA, MachineInstr &In) {
// Scan all defs in the block node BA and record in PhiM the locations of
// phi nodes corresponding to these defs.
void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
- NodeAddr<BlockNode*> BA) {
+ NodeAddr<BlockNode *> BA) {
// Check all defs from block BA and record them in each block in BA's
// iterated dominance frontier. This information will later be used to
// create phi nodes.
@@ -1383,13 +1402,13 @@ void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
// This is done to make sure that each defined reference gets only one
// phi node, even if it is defined multiple times.
RegisterSet Defs;
- for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this))
- for (NodeAddr<RefNode*> RA : IA.Addr->members_if(IsDef, *this))
+ for (NodeAddr<InstrNode *> IA : BA.Addr->members(*this))
+ for (NodeAddr<RefNode *> RA : IA.Addr->members_if(IsDef, *this))
Defs.insert(RA.Addr->getRegRef(*this));
// Calculate the iterated dominance frontier of BB.
const MachineDominanceFrontier::DomSetType &DF = DFLoc->second;
- SetVector<MachineBasicBlock*> IDF(DF.begin(), DF.end());
+ SetVector<MachineBasicBlock *> IDF(DF.begin(), DF.end());
for (unsigned i = 0; i < IDF.size(); ++i) {
auto F = MDF.find(IDF[i]);
if (F != MDF.end())
@@ -1399,7 +1418,7 @@ void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
// Finally, add the set of defs to each block in the iterated dominance
// frontier.
for (auto *DB : IDF) {
- NodeAddr<BlockNode*> DBA = findBlock(DB);
+ NodeAddr<BlockNode *> DBA = findBlock(DB);
PhiM[DBA.Id].insert(Defs.begin(), Defs.end());
}
}
@@ -1407,7 +1426,7 @@ void DataFlowGraph::recordDefsForDF(BlockRefsMap &PhiM,
// Given the locations of phi nodes in the map PhiM, create the phi nodes
// that are located in the block node BA.
void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
- NodeAddr<BlockNode*> BA) {
+ NodeAddr<BlockNode *> BA) {
// Check if this blocks has any DF defs, i.e. if there are any defs
// that this block is in the iterated dominance frontier of.
auto HasDF = PhiM.find(BA.Id);
@@ -1418,7 +1437,7 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
// such that T covers R. In other words, only leave those refs that
// are not covered by another ref (i.e. maximal with respect to covering).
- auto MaxCoverIn = [this] (RegisterRef RR, RegisterSet &RRs) -> RegisterRef {
+ auto MaxCoverIn = [this](RegisterRef RR, RegisterSet &RRs) -> RegisterRef {
for (RegisterRef I : RRs)
if (I != RR && RegisterAggr::isCoverOf(I, RR, PRI))
RR = I;
@@ -1443,8 +1462,8 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
auto NewEnd = std::unique(MaxRefs.begin(), MaxRefs.end());
MaxRefs.erase(NewEnd, MaxRefs.end());
- auto Aliased = [this,&MaxRefs](RegisterRef RR,
- std::vector<unsigned> &Closure) -> bool {
+ auto Aliased = [this, &MaxRefs](RegisterRef RR,
+ std::vector<unsigned> &Closure) -> bool {
for (unsigned I : Closure)
if (PRI.alias(RR, MaxRefs[I]))
return true;
@@ -1462,27 +1481,27 @@ void DataFlowGraph::buildPhis(BlockRefsMap &PhiM, RegisterSet &AllRefs,
// elements from MaxRefs to it, if they alias at least one element
// already in the closure.
// ClosureIdx: vector of indices in MaxRefs of members of the closure.
- std::vector<unsigned> ClosureIdx = { 0 };
+ std::vector<unsigned> ClosureIdx = {0};
for (unsigned i = 1; i != MaxRefs.size(); ++i)
if (Aliased(MaxRefs[i], ClosureIdx))
ClosureIdx.push_back(i);
// Build a phi for the closure.
unsigned CS = ClosureIdx.size();
- NodeAddr<PhiNode*> PA = newPhi(BA);
+ NodeAddr<PhiNode *> PA = newPhi(BA);
// Add defs.
for (unsigned X = 0; X != CS; ++X) {
RegisterRef RR = MaxRefs[ClosureIdx[X]];
uint16_t PhiFlags = NodeAttrs::PhiRef | NodeAttrs::Preserving;
- NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlags);
+ NodeAddr<DefNode *> DA = newDef(PA, RR, PhiFlags);
PA.Addr->addMember(DA, *this);
}
// Add phi uses.
- for (NodeAddr<BlockNode*> PBA : Preds) {
+ for (NodeAddr<BlockNode *> PBA : Preds) {
for (unsigned X = 0; X != CS; ++X) {
RegisterRef RR = MaxRefs[ClosureIdx[X]];
- NodeAddr<PhiUseNode*> PUA = newPhiUse(PA, RR, PBA);
+ NodeAddr<PhiUseNode *> PUA = newPhiUse(PA, RR, PBA);
PA.Addr->addMember(PUA, *this);
}
}
@@ -1503,16 +1522,16 @@ void DataFlowGraph::removeUnusedPhis() {
// that are easily determinable to be unnecessary.
SetVector<NodeId> PhiQ;
- for (NodeAddr<BlockNode*> BA : Func.Addr->members(*this)) {
+ for (NodeAddr<BlockNode *> BA : Func.Addr->members(*this)) {
for (auto P : BA.Addr->members_if(IsPhi, *this))
PhiQ.insert(P.Id);
}
static auto HasUsedDef = [](NodeList &Ms) -> bool {
- for (NodeAddr<NodeBase*> M : Ms) {
+ for (NodeAddr<NodeBase *> M : Ms) {
if (M.Addr->getKind() != NodeAttrs::Def)
continue;
- NodeAddr<DefNode*> DA = M;
+ NodeAddr<DefNode *> DA = M;
if (DA.Addr->getReachedDef() != 0 || DA.Addr->getReachedUse() != 0)
return true;
}
@@ -1523,15 +1542,15 @@ void DataFlowGraph::removeUnusedPhis() {
// For each removed phi, collect the potentially affected phis and add
// them back to the queue.
while (!PhiQ.empty()) {
- auto PA = addr<PhiNode*>(PhiQ[0]);
+ auto PA = addr<PhiNode *>(PhiQ[0]);
PhiQ.remove(PA.Id);
NodeList Refs = PA.Addr->members(*this);
if (HasUsedDef(Refs))
continue;
- for (NodeAddr<RefNode*> RA : Refs) {
+ for (NodeAddr<RefNode *> RA : Refs) {
if (NodeId RD = RA.Addr->getReachingDef()) {
- auto RDA = addr<DefNode*>(RD);
- NodeAddr<InstrNode*> OA = RDA.Addr->getOwner(*this);
+ auto RDA = addr<DefNode *>(RD);
+ NodeAddr<InstrNode *> OA = RDA.Addr->getOwner(*this);
if (IsPhi(OA))
PhiQ.insert(OA.Id);
}
@@ -1540,7 +1559,7 @@ void DataFlowGraph::removeUnusedPhis() {
else
unlinkUse(RA, true);
}
- NodeAddr<BlockNode*> BA = PA.Addr->getOwner(*this);
+ NodeAddr<BlockNode *> BA = PA.Addr->getOwner(*this);
BA.Addr->removeMember(PA, *this);
}
}
@@ -1549,8 +1568,8 @@ void DataFlowGraph::removeUnusedPhis() {
// reaching def of TA to the appropriate def node. Create any shadow nodes
// as appropriate.
template <typename T>
-void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
- DefStack &DS) {
+void DataFlowGraph::linkRefUp(NodeAddr<InstrNode *> IA, NodeAddr<T> TA,
+ DefStack &DS) {
if (DS.empty())
return;
RegisterRef RR = TA.Addr->getRegRef(*this);
@@ -1573,7 +1592,7 @@ void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
}
// The reaching def.
- NodeAddr<DefNode*> RDA = *I;
+ NodeAddr<DefNode *> RDA = *I;
// Pick the reached node.
if (TAP.Id == 0) {
@@ -1594,14 +1613,14 @@ void DataFlowGraph::linkRefUp(NodeAddr<InstrNode*> IA, NodeAddr<T> TA,
// Create data-flow links for all reference nodes in the statement node SA.
template <typename Predicate>
-void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
- Predicate P) {
+void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode *> SA,
+ Predicate P) {
#ifndef NDEBUG
RegisterSet Defs;
#endif
// Link all nodes (upwards in the data-flow) with their reaching defs.
- for (NodeAddr<RefNode*> RA : SA.Addr->members_if(P, *this)) {
+ for (NodeAddr<RefNode *> RA : SA.Addr->members_if(P, *this)) {
uint16_t Kind = RA.Addr->getKind();
assert(Kind == NodeAttrs::Def || Kind == NodeAttrs::Use);
RegisterRef RR = RA.Addr->getRegRef(*this);
@@ -1616,9 +1635,9 @@ void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
continue;
DefStack &DS = F->second;
if (Kind == NodeAttrs::Use)
- linkRefUp<UseNode*>(SA, RA, DS);
+ linkRefUp<UseNode *>(SA, RA, DS);
else if (Kind == NodeAttrs::Def)
- linkRefUp<DefNode*>(SA, RA, DS);
+ linkRefUp<DefNode *>(SA, RA, DS);
else
llvm_unreachable("Unexpected node in instruction");
}
@@ -1626,14 +1645,14 @@ void DataFlowGraph::linkStmtRefs(DefStackMap &DefM, NodeAddr<StmtNode*> SA,
// Create data-flow links for all instructions in the block node BA. This
// will include updating any phi nodes in BA.
-void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
+void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode *> BA) {
// Push block delimiters.
markBlock(BA.Id, DefM);
- auto IsClobber = [] (NodeAddr<RefNode*> RA) -> bool {
+ auto IsClobber = [](NodeAddr<RefNode *> RA) -> bool {
return IsDef(RA) && (RA.Addr->getFlags() & NodeAttrs::Clobbering);
};
- auto IsNoClobber = [] (NodeAddr<RefNode*> RA) -> bool {
+ auto IsNoClobber = [](NodeAddr<RefNode *> RA) -> bool {
return IsDef(RA) && !(RA.Addr->getFlags() & NodeAttrs::Clobbering);
};
@@ -1641,7 +1660,7 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
// For each non-phi instruction in the block, link all the defs and uses
// to their reaching defs. For any member of the block (including phis),
// push the defs on the corresponding stacks.
- for (NodeAddr<InstrNode*> IA : BA.Addr->members(*this)) {
+ for (NodeAddr<InstrNode *> IA : BA.Addr->members(*this)) {
// Ignore phi nodes here. They will be linked part by part from the
// predecessors.
if (IA.Addr->getKind() == NodeAttrs::Stmt) {
@@ -1662,16 +1681,16 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
MachineDomTreeNode *N = MDT.getNode(BA.Addr->getCode());
for (auto *I : *N) {
MachineBasicBlock *SB = I->getBlock();
- NodeAddr<BlockNode*> SBA = findBlock(SB);
+ NodeAddr<BlockNode *> SBA = findBlock(SB);
linkBlockRefs(DefM, SBA);
}
// Link the phi uses from the successor blocks.
- auto IsUseForBA = [BA](NodeAddr<NodeBase*> NA) -> bool {
+ auto IsUseForBA = [BA](NodeAddr<NodeBase *> NA) -> bool {
if (NA.Addr->getKind() != NodeAttrs::Use)
return false;
assert(NA.Addr->getFlags() & NodeAttrs::PhiRef);
- NodeAddr<PhiUseNode*> PUA = NA;
+ NodeAddr<PhiUseNode *> PUA = NA;
return PUA.Addr->getPredecessor() == BA.Id;
};
@@ -1680,21 +1699,21 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
for (MachineBasicBlock *SB : MBB->successors()) {
bool IsEHPad = SB->isEHPad();
- NodeAddr<BlockNode*> SBA = findBlock(SB);
- for (NodeAddr<InstrNode*> IA : SBA.Addr->members_if(IsPhi, *this)) {
+ NodeAddr<BlockNode *> SBA = findBlock(SB);
+ for (NodeAddr<InstrNode *> IA : SBA.Addr->members_if(IsPhi, *this)) {
// Do not link phi uses for landing pad live-ins.
if (IsEHPad) {
// Find what register this phi is for.
- NodeAddr<RefNode*> RA = IA.Addr->getFirstMember(*this);
+ NodeAddr<RefNode *> RA = IA.Addr->getFirstMember(*this);
assert(RA.Id != 0);
if (EHLiveIns.count(RA.Addr->getRegRef(*this)))
continue;
}
// Go over each phi use associated with MBB, and link it.
for (auto U : IA.Addr->members_if(IsUseForBA, *this)) {
- NodeAddr<PhiUseNode*> PUA = U;
+ NodeAddr<PhiUseNode *> PUA = U;
RegisterRef RR = PUA.Addr->getRegRef(*this);
- linkRefUp<UseNode*>(IA, PUA, DefM[RR.Reg]);
+ linkRefUp<UseNode *>(IA, PUA, DefM[RR.Reg]);
}
}
}
@@ -1704,7 +1723,7 @@ void DataFlowGraph::linkBlockRefs(DefStackMap &DefM, NodeAddr<BlockNode*> BA) {
}
// Remove the use node UA from any data-flow and structural links.
-void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
+void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode *> UA) {
NodeId RD = UA.Addr->getReachingDef();
NodeId Sib = UA.Addr->getSibling();
@@ -1713,8 +1732,8 @@ void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
return;
}
- auto RDA = addr<DefNode*>(RD);
- auto TA = addr<UseNode*>(RDA.Addr->getReachedUse());
+ auto RDA = addr<DefNode *>(RD);
+ auto TA = addr<UseNode *>(RDA.Addr->getReachedUse());
if (TA.Id == UA.Id) {
RDA.Addr->setReachedUse(Sib);
return;
@@ -1726,12 +1745,12 @@ void DataFlowGraph::unlinkUseDF(NodeAddr<UseNode*> UA) {
TA.Addr->setSibling(UA.Addr->getSibling());
return;
}
- TA = addr<UseNode*>(S);
+ TA = addr<UseNode *>(S);
}
}
// Remove the def node DA from any data-flow and structural links.
-void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
+void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode *> DA) {
//
// RD
// | reached
@@ -1756,10 +1775,10 @@ void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
// Also, defs reached by DA are now "promoted" to being reached by RD,
// so all of them will need to be spliced into the sibling chain where
// DA belongs.
- auto getAllNodes = [this] (NodeId N) -> NodeList {
+ auto getAllNodes = [this](NodeId N) -> NodeList {
NodeList Res;
while (N) {
- auto RA = addr<RefNode*>(N);
+ auto RA = addr<RefNode *>(N);
// Keep the nodes in the exact sibling order.
Res.push_back(RA);
N = RA.Addr->getSibling();
@@ -1770,14 +1789,14 @@ void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
NodeList ReachedUses = getAllNodes(DA.Addr->getReachedUse());
if (RD == 0) {
- for (NodeAddr<RefNode*> I : ReachedDefs)
+ for (NodeAddr<RefNode *> I : ReachedDefs)
I.Addr->setSibling(0);
- for (NodeAddr<RefNode*> I : ReachedUses)
+ for (NodeAddr<RefNode *> I : ReachedUses)
I.Addr->setSibling(0);
}
- for (NodeAddr<DefNode*> I : ReachedDefs)
+ for (NodeAddr<DefNode *> I : ReachedDefs)
I.Addr->setReachingDef(RD);
- for (NodeAddr<UseNode*> I : ReachedUses)
+ for (NodeAddr<UseNode *> I : ReachedUses)
I.Addr->setReachingDef(RD);
NodeId Sib = DA.Addr->getSibling();
@@ -1787,8 +1806,8 @@ void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
}
// Update the reaching def node and remove DA from the sibling list.
- auto RDA = addr<DefNode*>(RD);
- auto TA = addr<DefNode*>(RDA.Addr->getReachedDef());
+ auto RDA = addr<DefNode *>(RD);
+ auto TA = addr<DefNode *>(RDA.Addr->getReachedDef());
if (TA.Id == DA.Id) {
// If DA is the first reached def, just update the RD's reached def
// to the DA's sibling.
@@ -1802,19 +1821,19 @@ void DataFlowGraph::unlinkDefDF(NodeAddr<DefNode*> DA) {
TA.Addr->setSibling(Sib);
break;
}
- TA = addr<DefNode*>(S);
+ TA = addr<DefNode *>(S);
}
}
// Splice the DA's reached defs into the RDA's reached def chain.
if (!ReachedDefs.empty()) {
- auto Last = NodeAddr<DefNode*>(ReachedDefs.back());
+ auto Last = NodeAddr<DefNode *>(ReachedDefs.back());
Last.Addr->setSibling(RDA.Addr->getReachedDef());
RDA.Addr->setReachedDef(ReachedDefs.front().Id);
}
// Splice the DA's reached uses into the RDA's reached use chain.
if (!ReachedUses.empty()) {
- auto Last = NodeAddr<UseNode*>(ReachedUses.back());
+ auto Last = NodeAddr<UseNode *>(ReachedUses.back());
Last.Addr->setSibling(RDA.Addr->getReachedUse());
RDA.Addr->setReachedUse(ReachedUses.front().Id);
}
diff --git a/llvm/lib/CodeGen/RDFLiveness.cpp b/llvm/lib/CodeGen/RDFLiveness.cpp
index 9afa9e990f811..484ab6e5739e5 100644
--- a/llvm/lib/CodeGen/RDFLiveness.cpp
+++ b/llvm/lib/CodeGen/RDFLiveness.cpp
@@ -22,7 +22,6 @@
// and Embedded Architectures and Compilers", 8 (4),
// <10.1145/2086696.2086706>. <hal-00647369>
//
-#include "llvm/CodeGen/RDFLiveness.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
@@ -34,6 +33,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/RDFGraph.h"
+#include "llvm/CodeGen/RDFLiveness.h"
#include "llvm/CodeGen/RDFRegisters.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
@@ -54,25 +54,26 @@ using namespace llvm;
using namespace rdf;
static cl::opt<unsigned> MaxRecNest("rdf-liveness-max-rec", cl::init(25),
- cl::Hidden, cl::desc("Maximum recursion level"));
+ cl::Hidden,
+ cl::desc("Maximum recursion level"));
namespace llvm {
namespace rdf {
- raw_ostream &operator<< (raw_ostream &OS, const Print<Liveness::RefMap> &P) {
- OS << '{';
- for (const auto &I : P.Obj) {
- OS << ' ' << printReg(I.first, &P.G.getTRI()) << '{';
- for (auto J = I.second.begin(), E = I.second.end(); J != E; ) {
- OS << Print(J->first, P.G) << PrintLaneMaskOpt(J->second);
- if (++J != E)
- OS << ',';
- }
- OS << '}';
+raw_ostream &operator<<(raw_ostream &OS, const Print<Liveness::RefMap> &P) {
+ OS << '{';
+ for (const auto &I : P.Obj) {
+ OS << ' ' << printReg(I.first, &P.G.getTRI()) << '{';
+ for (auto J = I.second.begin(), E = I.second.end(); J != E;) {
+ OS << Print(J->first, P.G) << PrintLaneMaskOpt(J->second);
+ if (++J != E)
+ OS << ',';
}
- OS << " }";
- return OS;
+ OS << '}';
}
+ OS << " }";
+ return OS;
+}
} // end namespace rdf
} // end namespace llvm
@@ -106,11 +107,12 @@ namespace rdf {
// the data-flow.
NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
- NodeAddr<RefNode*> RefA, bool TopShadows, bool FullChain,
- const RegisterAggr &DefRRs) {
+ NodeAddr<RefNode *> RefA, bool TopShadows,
+ bool FullChain,
+ const RegisterAggr &DefRRs) {
NodeList RDefs; // Return value.
SetVector<NodeId> DefQ;
- DenseMap<MachineInstr*, uint32_t> OrdMap;
+ DenseMap<MachineInstr *, uint32_t> OrdMap;
// Dead defs will be treated as if they were live, since they are actually
// on the data-flow path. They cannot be ignored because even though they
@@ -124,12 +126,12 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
// whole point of a shadow is that it will have a reaching def that
// is not aliased to the reaching defs of the related shadows.
NodeId Start = RefA.Id;
- auto SNA = DFG.addr<RefNode*>(Start);
+ auto SNA = DFG.addr<RefNode *>(Start);
if (NodeId RD = SNA.Addr->getReachingDef())
DefQ.insert(RD);
if (TopShadows) {
for (auto S : DFG.getRelatedRefs(RefA.Addr->getOwner(DFG), RefA))
- if (NodeId RD = NodeAddr<RefNode*>(S).Addr->getReachingDef())
+ if (NodeId RD = NodeAddr<RefNode *>(S).Addr->getReachingDef())
DefQ.insert(RD);
}
@@ -140,7 +142,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
// It is possible that a collection of non-covering (individually) defs
// will be sufficient, but keep going until a covering one is found.
for (unsigned i = 0; i < DefQ.size(); ++i) {
- auto TA = DFG.addr<DefNode*>(DefQ[i]);
+ auto TA = DFG.addr<DefNode *>(DefQ[i]);
if (TA.Addr->getFlags() & NodeAttrs::PhiRef)
continue;
// Stop at the covering/overwriting def of the initial register reference.
@@ -151,7 +153,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
// Get the next level of reaching defs. This will include multiple
// reaching defs for shadows.
for (auto S : DFG.getRelatedRefs(TA.Addr->getOwner(DFG), TA))
- if (NodeId RD = NodeAddr<RefNode*>(S).Addr->getReachingDef())
+ if (NodeId RD = NodeAddr<RefNode *>(S).Addr->getReachingDef())
DefQ.insert(RD);
// Don't visit sibling defs. They share the same reaching def (which
// will be visited anyway), but they define something not aliased to
@@ -159,42 +161,42 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
}
// Return the MachineBasicBlock containing a given instruction.
- auto Block = [this] (NodeAddr<InstrNode*> IA) -> MachineBasicBlock* {
+ auto Block = [this](NodeAddr<InstrNode *> IA) -> MachineBasicBlock * {
if (IA.Addr->getKind() == NodeAttrs::Stmt)
- return NodeAddr<StmtNode*>(IA).Addr->getCode()->getParent();
+ return NodeAddr<StmtNode *>(IA).Addr->getCode()->getParent();
assert(IA.Addr->getKind() == NodeAttrs::Phi);
- NodeAddr<PhiNode*> PA = IA;
- NodeAddr<BlockNode*> BA = PA.Addr->getOwner(DFG);
+ NodeAddr<PhiNode *> PA = IA;
+ NodeAddr<BlockNode *> BA = PA.Addr->getOwner(DFG);
return BA.Addr->getCode();
};
- SmallSet<NodeId,32> Defs;
+ SmallSet<NodeId, 32> Defs;
// Remove all non-phi defs that are not aliased to RefRR, and separate
// the the remaining defs into buckets for containing blocks.
- std::map<NodeId, NodeAddr<InstrNode*>> Owners;
- std::map<MachineBasicBlock*, SmallVector<NodeId,32>> Blocks;
+ std::map<NodeId, NodeAddr<InstrNode *>> Owners;
+ std::map<MachineBasicBlock *, SmallVector<NodeId, 32>> Blocks;
for (NodeId N : DefQ) {
- auto TA = DFG.addr<DefNode*>(N);
+ auto TA = DFG.addr<DefNode *>(N);
bool IsPhi = TA.Addr->getFlags() & NodeAttrs::PhiRef;
if (!IsPhi && !PRI.alias(RefRR, TA.Addr->getRegRef(DFG)))
continue;
Defs.insert(TA.Id);
- NodeAddr<InstrNode*> IA = TA.Addr->getOwner(DFG);
+ NodeAddr<InstrNode *> IA = TA.Addr->getOwner(DFG);
Owners[TA.Id] = IA;
Blocks[Block(IA)].push_back(IA.Id);
}
- auto Precedes = [this,&OrdMap] (NodeId A, NodeId B) {
+ auto Precedes = [this, &OrdMap](NodeId A, NodeId B) {
if (A == B)
return false;
- NodeAddr<InstrNode*> OA = DFG.addr<InstrNode*>(A);
- NodeAddr<InstrNode*> OB = DFG.addr<InstrNode*>(B);
+ NodeAddr<InstrNode *> OA = DFG.addr<InstrNode *>(A);
+ NodeAddr<InstrNode *> OB = DFG.addr<InstrNode *>(B);
bool StmtA = OA.Addr->getKind() == NodeAttrs::Stmt;
bool StmtB = OB.Addr->getKind() == NodeAttrs::Stmt;
if (StmtA && StmtB) {
- const MachineInstr *InA = NodeAddr<StmtNode*>(OA).Addr->getCode();
- const MachineInstr *InB = NodeAddr<StmtNode*>(OB).Addr->getCode();
+ const MachineInstr *InA = NodeAddr<StmtNode *>(OA).Addr->getCode();
+ const MachineInstr *InB = NodeAddr<StmtNode *>(OB).Addr->getCode();
assert(InA->getParent() == InB->getParent());
auto FA = OrdMap.find(InA);
if (FA != OrdMap.end())
@@ -217,14 +219,14 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
return !StmtA;
};
- auto GetOrder = [&OrdMap] (MachineBasicBlock &B) {
+ auto GetOrder = [&OrdMap](MachineBasicBlock &B) {
uint32_t Pos = 0;
for (MachineInstr &In : B)
OrdMap.insert({&In, ++Pos});
};
// For each block, sort the nodes in it.
- std::vector<MachineBasicBlock*> TmpBB;
+ std::vector<MachineBasicBlock *> TmpBB;
for (auto &Bucket : Blocks) {
TmpBB.push_back(Bucket.first);
if (Bucket.second.size() > 2)
@@ -261,18 +263,17 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
RegisterAggr RRs(DefRRs);
- auto DefInSet = [&Defs] (NodeAddr<RefNode*> TA) -> bool {
- return TA.Addr->getKind() == NodeAttrs::Def &&
- Defs.count(TA.Id);
+ auto DefInSet = [&Defs](NodeAddr<RefNode *> TA) -> bool {
+ return TA.Addr->getKind() == NodeAttrs::Def && Defs.count(TA.Id);
};
for (NodeId T : TmpInst) {
if (!FullChain && RRs.hasCoverOf(RefRR))
break;
- auto TA = DFG.addr<InstrNode*>(T);
+ auto TA = DFG.addr<InstrNode *>(T);
bool IsPhi = DFG.IsCode<NodeAttrs::Phi>(TA);
NodeList Ds;
- for (NodeAddr<DefNode*> DA : TA.Addr->members_if(DefInSet, DFG)) {
+ for (NodeAddr<DefNode *> DA : TA.Addr->members_if(DefInSet, DFG)) {
RegisterRef QR = DA.Addr->getRegRef(DFG);
// Add phi defs even if they are covered by subsequent defs. This is
// for cases where the reached use is not covered by any of the defs
@@ -286,7 +287,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
Ds.push_back(DA);
}
llvm::append_range(RDefs, Ds);
- for (NodeAddr<DefNode*> DA : Ds) {
+ for (NodeAddr<DefNode *> DA : Ds) {
// When collecting a full chain of definitions, do not consider phi
// defs to actually define a register.
uint16_t Flags = DA.Addr->getFlags();
@@ -296,7 +297,7 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
}
}
- auto DeadP = [](const NodeAddr<DefNode*> DA) -> bool {
+ auto DeadP = [](const NodeAddr<DefNode *> DA) -> bool {
return DA.Addr->getFlags() & NodeAttrs::Dead;
};
llvm::erase_if(RDefs, DeadP);
@@ -304,81 +305,82 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
return RDefs;
}
-std::pair<NodeSet,bool>
-Liveness::getAllReachingDefsRec(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
- NodeSet &Visited, const NodeSet &Defs) {
+std::pair<NodeSet, bool>
+Liveness::getAllReachingDefsRec(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
+ NodeSet &Visited, const NodeSet &Defs) {
return getAllReachingDefsRecImpl(RefRR, RefA, Visited, Defs, 0, MaxRecNest);
}
-std::pair<NodeSet,bool>
-Liveness::getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode*> RefA,
- NodeSet &Visited, const NodeSet &Defs, unsigned Nest, unsigned MaxNest) {
+std::pair<NodeSet, bool>
+Liveness::getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
+ NodeSet &Visited, const NodeSet &Defs,
+ unsigned Nest, unsigned MaxNest) {
if (Nest > MaxNest)
- return { NodeSet(), false };
+ return {NodeSet(), false};
// Collect all defined registers. Do not consider phis to be defining
// anything, only collect "real" definitions.
RegisterAggr DefRRs(PRI);
for (NodeId D : Defs) {
- const auto DA = DFG.addr<const DefNode*>(D);
+ const auto DA = DFG.addr<const DefNode *>(D);
if (!(DA.Addr->getFlags() & NodeAttrs::PhiRef))
DefRRs.insert(DA.Addr->getRegRef(DFG));
}
NodeList RDs = getAllReachingDefs(RefRR, RefA, false, true, DefRRs);
if (RDs.empty())
- return { Defs, true };
+ return {Defs, true};
// Make a copy of the preexisting definitions and add the newly found ones.
NodeSet TmpDefs = Defs;
- for (NodeAddr<NodeBase*> R : RDs)
+ for (NodeAddr<NodeBase *> R : RDs)
TmpDefs.insert(R.Id);
NodeSet Result = Defs;
- for (NodeAddr<DefNode*> DA : RDs) {
+ for (NodeAddr<DefNode *> DA : RDs) {
Result.insert(DA.Id);
if (!(DA.Addr->getFlags() & NodeAttrs::PhiRef))
continue;
- NodeAddr<PhiNode*> PA = DA.Addr->getOwner(DFG);
+ NodeAddr<PhiNode *> PA = DA.Addr->getOwner(DFG);
if (!Visited.insert(PA.Id).second)
continue;
// Go over all phi uses and get the reaching defs for each use.
for (auto U : PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG)) {
const auto &T = getAllReachingDefsRecImpl(RefRR, U, Visited, TmpDefs,
- Nest+1, MaxNest);
+ Nest + 1, MaxNest);
if (!T.second)
- return { T.first, false };
+ return {T.first, false};
Result.insert(T.first.begin(), T.first.end());
}
}
- return { Result, true };
+ return {Result, true};
}
/// Find the nearest ref node aliased to RefRR, going upwards in the data
/// flow, starting from the instruction immediately preceding Inst.
-NodeAddr<RefNode*> Liveness::getNearestAliasedRef(RegisterRef RefRR,
- NodeAddr<InstrNode*> IA) {
- NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG);
+NodeAddr<RefNode *> Liveness::getNearestAliasedRef(RegisterRef RefRR,
+ NodeAddr<InstrNode *> IA) {
+ NodeAddr<BlockNode *> BA = IA.Addr->getOwner(DFG);
NodeList Ins = BA.Addr->members(DFG);
NodeId FindId = IA.Id;
auto E = Ins.rend();
- auto B = std::find_if(Ins.rbegin(), E,
- [FindId] (const NodeAddr<InstrNode*> T) {
- return T.Id == FindId;
- });
+ auto B =
+ std::find_if(Ins.rbegin(), E, [FindId](const NodeAddr<InstrNode *> T) {
+ return T.Id == FindId;
+ });
// Do not scan IA (which is what B would point to).
if (B != E)
++B;
do {
// Process the range of instructions from B to E.
- for (NodeAddr<InstrNode*> I : make_range(B, E)) {
+ for (NodeAddr<InstrNode *> I : make_range(B, E)) {
NodeList Refs = I.Addr->members(DFG);
- NodeAddr<RefNode*> Clob, Use;
+ NodeAddr<RefNode *> Clob, Use;
// Scan all the refs in I aliased to RefRR, and return the one that
// is the closest to the output of I, i.e. def > clobber > use.
- for (NodeAddr<RefNode*> R : Refs) {
+ for (NodeAddr<RefNode *> R : Refs) {
if (!PRI.alias(R.Addr->getRegRef(DFG), RefRR))
continue;
if (DFG.IsDef(R)) {
@@ -398,7 +400,7 @@ NodeAddr<RefNode*> Liveness::getNearestAliasedRef(RegisterRef RefRR,
// Go up to the immediate dominator, if any.
MachineBasicBlock *BB = BA.Addr->getCode();
- BA = NodeAddr<BlockNode*>();
+ BA = NodeAddr<BlockNode *>();
if (MachineDomTreeNode *N = MDT.getNode(BB)) {
if ((N = N->getIDom()))
BA = DFG.findBlock(N->getBlock());
@@ -411,11 +413,11 @@ NodeAddr<RefNode*> Liveness::getNearestAliasedRef(RegisterRef RefRR,
E = Ins.rend();
} while (true);
- return NodeAddr<RefNode*>();
+ return NodeAddr<RefNode *>();
}
-NodeSet Liveness::getAllReachedUses(RegisterRef RefRR,
- NodeAddr<DefNode*> DefA, const RegisterAggr &DefRRs) {
+NodeSet Liveness::getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode *> DefA,
+ const RegisterAggr &DefRRs) {
NodeSet Uses;
// If the original register is already covered by all the intervening
@@ -428,7 +430,7 @@ NodeSet Liveness::getAllReachedUses(RegisterRef RefRR,
bool IsDead = DefA.Addr->getFlags() & NodeAttrs::Dead;
NodeId U = !IsDead ? DefA.Addr->getReachedUse() : 0;
while (U != 0) {
- auto UA = DFG.addr<UseNode*>(U);
+ auto UA = DFG.addr<UseNode *>(U);
if (!(UA.Addr->getFlags() & NodeAttrs::Undef)) {
RegisterRef UR = UA.Addr->getRegRef(DFG);
if (PRI.alias(RefRR, UR) && !DefRRs.hasCoverOf(UR))
@@ -439,7 +441,7 @@ NodeSet Liveness::getAllReachedUses(RegisterRef RefRR,
// Traverse all reached defs. This time dead defs cannot be ignored.
for (NodeId D = DefA.Addr->getReachedDef(), NextD; D != 0; D = NextD) {
- auto DA = DFG.addr<DefNode*>(D);
+ auto DA = DFG.addr<DefNode *>(D);
NextD = DA.Addr->getSibling();
RegisterRef DR = DA.Addr->getRegRef(DFG);
// If this def is already covered, it cannot reach anything new.
@@ -464,20 +466,21 @@ void Liveness::computePhiInfo() {
RealUseMap.clear();
NodeList Phis;
- NodeAddr<FuncNode*> FA = DFG.getFunc();
+ NodeAddr<FuncNode *> FA = DFG.getFunc();
NodeList Blocks = FA.Addr->members(DFG);
- for (NodeAddr<BlockNode*> BA : Blocks) {
+ for (NodeAddr<BlockNode *> BA : Blocks) {
auto Ps = BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG);
llvm::append_range(Phis, Ps);
}
// phi use -> (map: reaching phi -> set of registers defined in between)
- std::map<NodeId,std::map<NodeId,RegisterAggr>> PhiUp;
- std::vector<NodeId> PhiUQ; // Work list of phis for upward propagation.
- std::unordered_map<NodeId,RegisterAggr> PhiDRs; // Phi -> registers defined by it.
+ std::map<NodeId, std::map<NodeId, RegisterAggr>> PhiUp;
+ std::vector<NodeId> PhiUQ; // Work list of phis for upward propagation.
+ std::unordered_map<NodeId, RegisterAggr>
+ PhiDRs; // Phi -> registers defined by it.
// Go over all phis.
- for (NodeAddr<PhiNode*> PhiA : Phis) {
+ for (NodeAddr<PhiNode *> PhiA : Phis) {
// Go over all defs and collect the reached uses that are non-phi uses
// (i.e. the "real uses").
RefMap &RealUses = RealUseMap[PhiA.Id];
@@ -488,7 +491,7 @@ void Liveness::computePhiInfo() {
SetVector<NodeId> DefQ;
NodeSet PhiDefs;
RegisterAggr DRs(PRI);
- for (NodeAddr<RefNode*> R : PhiRefs) {
+ for (NodeAddr<RefNode *> R : PhiRefs) {
if (!DFG.IsRef<NodeAttrs::Def>(R))
continue;
DRs.insert(R.Addr->getRegRef(DFG));
@@ -503,17 +506,17 @@ void Liveness::computePhiInfo() {
// This set of uses will later be trimmed to only contain these uses that
// are actually reached by the phi defs.
for (unsigned i = 0; i < DefQ.size(); ++i) {
- NodeAddr<DefNode*> DA = DFG.addr<DefNode*>(DefQ[i]);
+ NodeAddr<DefNode *> DA = DFG.addr<DefNode *>(DefQ[i]);
// Visit all reached uses. Phi defs should not really have the "dead"
// flag set, but check it anyway for consistency.
bool IsDead = DA.Addr->getFlags() & NodeAttrs::Dead;
NodeId UN = !IsDead ? DA.Addr->getReachedUse() : 0;
while (UN != 0) {
- NodeAddr<UseNode*> A = DFG.addr<UseNode*>(UN);
+ NodeAddr<UseNode *> A = DFG.addr<UseNode *>(UN);
uint16_t F = A.Addr->getFlags();
if ((F & (NodeAttrs::Undef | NodeAttrs::PhiRef)) == 0) {
RegisterRef R = A.Addr->getRegRef(DFG);
- RealUses[R.Reg].insert({A.Id,R.Mask});
+ RealUses[R.Reg].insert({A.Id, R.Mask});
}
UN = A.Addr->getSibling();
}
@@ -522,9 +525,9 @@ void Liveness::computePhiInfo() {
// later.
NodeId DN = DA.Addr->getReachedDef();
while (DN != 0) {
- NodeAddr<DefNode*> A = DFG.addr<DefNode*>(DN);
+ NodeAddr<DefNode *> A = DFG.addr<DefNode *>(DN);
for (auto T : DFG.getRelatedRefs(A.Addr->getOwner(DFG), A)) {
- uint16_t Flags = NodeAddr<DefNode*>(T).Addr->getFlags();
+ uint16_t Flags = NodeAddr<DefNode *>(T).Addr->getFlags();
// Must traverse the reached-def chain. Consider:
// def(D0) -> def(R0) -> def(R0) -> use(D0)
// The reachable use of D0 passes through a def of R0.
@@ -546,21 +549,21 @@ void Liveness::computePhiInfo() {
// = R1:0 u6 Not reached by d1 (covered collectively
// by d3 and d5), but following reached
// defs and uses from d1 will lead here.
- for (auto UI = RealUses.begin(), UE = RealUses.end(); UI != UE; ) {
+ for (auto UI = RealUses.begin(), UE = RealUses.end(); UI != UE;) {
// For each reached register UI->first, there is a set UI->second, of
// uses of it. For each such use, check if it is reached by this phi,
// i.e. check if the set of its reaching uses intersects the set of
// this phi's defs.
NodeRefSet Uses = UI->second;
UI->second.clear();
- for (std::pair<NodeId,LaneBitmask> I : Uses) {
- auto UA = DFG.addr<UseNode*>(I.first);
+ for (std::pair<NodeId, LaneBitmask> I : Uses) {
+ auto UA = DFG.addr<UseNode *>(I.first);
// Undef flag is checked above.
assert((UA.Addr->getFlags() & NodeAttrs::Undef) == 0);
RegisterRef R(UI->first, I.second);
// Calculate the exposed part of the reached use.
RegisterAggr Covered(PRI);
- for (NodeAddr<DefNode*> DA : getAllReachingDefs(R, UA)) {
+ for (NodeAddr<DefNode *> DA : getAllReachingDefs(R, UA)) {
if (PhiDefs.count(DA.Id))
break;
Covered.insert(DA.Addr->getRegRef(DFG));
@@ -590,7 +593,7 @@ void Liveness::computePhiInfo() {
for (auto I : PhiRefs) {
if (!DFG.IsRef<NodeAttrs::Use>(I) || SeenUses.count(I.Id))
continue;
- NodeAddr<PhiUseNode*> PUA = I;
+ NodeAddr<PhiUseNode *> PUA = I;
if (PUA.Addr->getReachingDef() == 0)
continue;
@@ -598,10 +601,10 @@ void Liveness::computePhiInfo() {
NodeList Ds = getAllReachingDefs(UR, PUA, true, false, NoRegs);
RegisterAggr DefRRs(PRI);
- for (NodeAddr<DefNode*> D : Ds) {
+ for (NodeAddr<DefNode *> D : Ds) {
if (D.Addr->getFlags() & NodeAttrs::PhiRef) {
NodeId RP = D.Addr->getOwner(DFG).Id;
- std::map<NodeId,RegisterAggr> &M = PhiUp[PUA.Id];
+ std::map<NodeId, RegisterAggr> &M = PhiUp[PUA.Id];
auto F = M.find(RP);
if (F == M.end())
M.insert(std::make_pair(RP, DefRRs));
@@ -611,7 +614,7 @@ void Liveness::computePhiInfo() {
DefRRs.insert(D.Addr->getRegRef(DFG));
}
- for (NodeAddr<PhiUseNode*> T : DFG.getRelatedRefs(PhiA, PUA))
+ for (NodeAddr<PhiUseNode *> T : DFG.getRelatedRefs(PhiA, PUA))
SeenUses.insert(T.Id);
}
}
@@ -654,7 +657,7 @@ void Liveness::computePhiInfo() {
// ref.
using SubMap = std::unordered_map<RegisterRef, RegisterRef>;
std::unordered_map<RegisterAggr, SubMap> Subs;
- auto ClearIn = [] (RegisterRef RR, const RegisterAggr &Mid, SubMap &SM) {
+ auto ClearIn = [](RegisterRef RR, const RegisterAggr &Mid, SubMap &SM) {
if (Mid.empty())
return RR;
auto F = SM.find(RR);
@@ -667,12 +670,12 @@ void Liveness::computePhiInfo() {
// Go over all phis.
for (unsigned i = 0; i < PhiUQ.size(); ++i) {
- auto PA = DFG.addr<PhiNode*>(PhiUQ[i]);
+ auto PA = DFG.addr<PhiNode *>(PhiUQ[i]);
NodeList PUs = PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG);
RefMap &RUM = RealUseMap[PA.Id];
- for (NodeAddr<UseNode*> UA : PUs) {
- std::map<NodeId,RegisterAggr> &PUM = PhiUp[UA.Id];
+ for (NodeAddr<UseNode *> UA : PUs) {
+ std::map<NodeId, RegisterAggr> &PUM = PhiUp[UA.Id];
RegisterRef UR = UA.Addr->getRegRef(DFG);
for (const std::pair<const NodeId, RegisterAggr> &P : PUM) {
bool Changed = false;
@@ -699,13 +702,13 @@ void Liveness::computePhiInfo() {
if (!DRs.hasAliasOf(R))
continue;
R = PRI.mapTo(DRs.intersectWith(R), T.first);
- for (std::pair<NodeId,LaneBitmask> V : T.second) {
+ for (std::pair<NodeId, LaneBitmask> V : T.second) {
LaneBitmask M = R.Mask & V.second;
if (M.none())
continue;
if (RegisterRef SS = ClearIn(RegisterRef(R.Reg, M), MidDefs, SM)) {
NodeRefSet &RS = RealUseMap[P.first][SS.Reg];
- Changed |= RS.insert({V.first,SS.Mask}).second;
+ Changed |= RS.insert({V.first, SS.Mask}).second;
}
}
}
@@ -720,10 +723,10 @@ void Liveness::computePhiInfo() {
dbgs() << "Real use map:\n";
for (auto I : RealUseMap) {
dbgs() << "phi " << Print(I.first, DFG);
- NodeAddr<PhiNode*> PA = DFG.addr<PhiNode*>(I.first);
+ NodeAddr<PhiNode *> PA = DFG.addr<PhiNode *>(I.first);
NodeList Ds = PA.Addr->members_if(DFG.IsRef<NodeAttrs::Def>, DFG);
if (!Ds.empty()) {
- RegisterRef RR = NodeAddr<DefNode*>(Ds[0]).Addr->getRegRef(DFG);
+ RegisterRef RR = NodeAddr<DefNode *>(Ds[0]).Addr->getRegRef(DFG);
dbgs() << '<' << Print(RR, DFG) << '>';
} else {
dbgs() << "<noreg>";
@@ -737,10 +740,10 @@ void Liveness::computeLiveIns() {
// Populate the node-to-block map. This speeds up the calculations
// significantly.
NBMap.clear();
- for (NodeAddr<BlockNode*> BA : DFG.getFunc().Addr->members(DFG)) {
+ for (NodeAddr<BlockNode *> BA : DFG.getFunc().Addr->members(DFG)) {
MachineBasicBlock *BB = BA.Addr->getCode();
- for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) {
- for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG))
+ for (NodeAddr<InstrNode *> IA : BA.Addr->members(DFG)) {
+ for (NodeAddr<RefNode *> RA : IA.Addr->members(DFG))
NBMap.insert(std::make_pair(RA.Id, BB));
NBMap.insert(std::make_pair(IA.Id, BB));
}
@@ -754,7 +757,7 @@ void Liveness::computeLiveIns() {
auto F1 = MDF.find(&B);
if (F1 == MDF.end())
continue;
- SetVector<MachineBasicBlock*> IDFB(F1->second.begin(), F1->second.end());
+ SetVector<MachineBasicBlock *> IDFB(F1->second.begin(), F1->second.end());
for (unsigned i = 0; i < IDFB.size(); ++i) {
auto F2 = MDF.find(IDFB[i]);
if (F2 != MDF.end())
@@ -771,11 +774,11 @@ void Liveness::computeLiveIns() {
computePhiInfo();
- NodeAddr<FuncNode*> FA = DFG.getFunc();
+ NodeAddr<FuncNode *> FA = DFG.getFunc();
NodeList Blocks = FA.Addr->members(DFG);
// Build the phi live-on-entry map.
- for (NodeAddr<BlockNode*> BA : Blocks) {
+ for (NodeAddr<BlockNode *> BA : Blocks) {
MachineBasicBlock *MB = BA.Addr->getCode();
RefMap &LON = PhiLON[MB];
for (auto P : BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG))
@@ -793,9 +796,9 @@ void Liveness::computeLiveIns() {
// Build the phi live-on-exit map. Each phi node has some set of reached
// "real" uses. Propagate this set backwards into the block predecessors
// through the reaching defs of the corresponding phi uses.
- for (NodeAddr<BlockNode*> BA : Blocks) {
+ for (NodeAddr<BlockNode *> BA : Blocks) {
NodeList Phis = BA.Addr->members_if(DFG.IsCode<NodeAttrs::Phi>, DFG);
- for (NodeAddr<PhiNode*> PA : Phis) {
+ for (NodeAddr<PhiNode *> PA : Phis) {
RefMap &RUs = RealUseMap[PA.Id];
if (RUs.empty())
continue;
@@ -804,7 +807,7 @@ void Liveness::computeLiveIns() {
for (auto U : PA.Addr->members_if(DFG.IsRef<NodeAttrs::Use>, DFG)) {
if (!SeenUses.insert(U.Id).second)
continue;
- NodeAddr<PhiUseNode*> PUA = U;
+ NodeAddr<PhiUseNode *> PUA = U;
if (PUA.Addr->getReachingDef() == 0)
continue;
@@ -819,18 +822,18 @@ void Liveness::computeLiveIns() {
// For each reached "real" use, identify the set of reaching defs
// coming from each predecessor P, and add them to PhiLOX[P].
//
- auto PrA = DFG.addr<BlockNode*>(PUA.Addr->getPredecessor());
+ auto PrA = DFG.addr<BlockNode *>(PUA.Addr->getPredecessor());
RefMap &LOX = PhiLOX[PrA.Addr->getCode()];
for (const std::pair<const RegisterId, NodeRefSet> &RS : RUs) {
// We need to visit each individual use.
- for (std::pair<NodeId,LaneBitmask> P : RS.second) {
+ for (std::pair<NodeId, LaneBitmask> P : RS.second) {
// Create a register ref corresponding to the use, and find
// all reaching defs starting from the phi use, and treating
// all related shadows as a single use cluster.
RegisterRef S(RS.first, P.second);
NodeList Ds = getAllReachingDefs(S, PUA, true, false, NoRegs);
- for (NodeAddr<DefNode*> D : Ds) {
+ for (NodeAddr<DefNode *> D : Ds) {
// Calculate the mask corresponding to the visited def.
RegisterAggr TA(PRI);
TA.insert(D.Addr->getRegRef(DFG)).intersect(S);
@@ -840,11 +843,11 @@ void Liveness::computeLiveIns() {
}
}
- for (NodeAddr<PhiUseNode*> T : DFG.getRelatedRefs(PA, PUA))
+ for (NodeAddr<PhiUseNode *> T : DFG.getRelatedRefs(PA, PUA))
SeenUses.insert(T.Id);
- } // for U : phi uses
- } // for P : Phis
- } // for B : Blocks
+ } // for U : phi uses
+ } // for P : Phis
+ } // for B : Blocks
if (Trace) {
dbgs() << "Phi live-on-exit map:\n";
@@ -870,7 +873,7 @@ void Liveness::computeLiveIns() {
for (auto I : LV)
dbgs() << ' ' << Print(I, DFG);
dbgs() << " }\n";
- //dbgs() << "\tcomp = " << Print(LiveMap[&B], DFG) << '\n';
+ // dbgs() << "\tcomp = " << Print(LiveMap[&B], DFG) << '\n';
LV.clear();
const RegisterAggr &LG = LiveMap[&B];
@@ -881,7 +884,6 @@ void Liveness::computeLiveIns() {
for (auto I : LV)
dbgs() << ' ' << Print(I, DFG);
dbgs() << " }\n";
-
}
}
}
@@ -907,7 +909,7 @@ void Liveness::resetKills() {
}
void Liveness::resetKills(MachineBasicBlock *B) {
- auto CopyLiveIns = [this] (MachineBasicBlock *B, BitVector &LV) -> void {
+ auto CopyLiveIns = [this](MachineBasicBlock *B, BitVector &LV) -> void {
for (auto I : B->liveins()) {
MCSubRegIndexIterator S(I.PhysReg, &TRI);
if (!S.isValid()) {
@@ -1048,9 +1050,9 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
const NodeRefSet &OldDefs = LE.second;
for (NodeRef OR : OldDefs) {
// R is a def node that was live-on-exit
- auto DA = DFG.addr<DefNode*>(OR.first);
- NodeAddr<InstrNode*> IA = DA.Addr->getOwner(DFG);
- NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG);
+ auto DA = DFG.addr<DefNode *>(OR.first);
+ NodeAddr<InstrNode *> IA = DA.Addr->getOwner(DFG);
+ NodeAddr<BlockNode *> BA = IA.Addr->getOwner(DFG);
if (B != BA.Addr->getCode()) {
// Defs from a
diff erent block need to be preserved. Defs from this
// block will need to be processed further, except for phi defs, the
@@ -1081,10 +1083,10 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
// There could be other defs in this block that are a part of that
// chain. Check that now: accumulate the registers from these defs,
// and if they all together cover LRef, it is not live-on-entry.
- for (NodeAddr<DefNode*> TA : getAllReachingDefs(DA)) {
+ for (NodeAddr<DefNode *> TA : getAllReachingDefs(DA)) {
// DefNode -> InstrNode -> BlockNode.
- NodeAddr<InstrNode*> ITA = TA.Addr->getOwner(DFG);
- NodeAddr<BlockNode*> BTA = ITA.Addr->getOwner(DFG);
+ NodeAddr<InstrNode *> ITA = TA.Addr->getOwner(DFG);
+ NodeAddr<BlockNode *> BTA = ITA.Addr->getOwner(DFG);
// Reaching defs are ordered in the upward direction.
if (BTA.Addr->getCode() != B) {
// We have reached past the beginning of B, and the accumulated
@@ -1093,7 +1095,7 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
// Subtract all accumulated defs (RRs) from LRef.
RegisterRef T = RRs.clearIn(LRef);
assert(T);
- NewDefs.insert({TA.Id,T.Mask});
+ NewDefs.insert({TA.Id, T.Mask});
break;
}
@@ -1118,16 +1120,16 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
// Scan the block for upward-exposed uses and add them to the tracking set.
for (auto I : DFG.getFunc().Addr->findBlock(B, DFG).Addr->members(DFG)) {
- NodeAddr<InstrNode*> IA = I;
+ NodeAddr<InstrNode *> IA = I;
if (IA.Addr->getKind() != NodeAttrs::Stmt)
continue;
- for (NodeAddr<UseNode*> UA : IA.Addr->members_if(DFG.IsUse, DFG)) {
+ for (NodeAddr<UseNode *> UA : IA.Addr->members_if(DFG.IsUse, DFG)) {
if (UA.Addr->getFlags() & NodeAttrs::Undef)
continue;
RegisterRef RR = UA.Addr->getRegRef(DFG);
- for (NodeAddr<DefNode*> D : getAllReachingDefs(UA))
+ for (NodeAddr<DefNode *> D : getAllReachingDefs(UA))
if (getBlockWithRef(D.Id) != B)
- LiveIn[RR.Reg].insert({D.Id,RR.Mask});
+ LiveIn[RR.Reg].insert({D.Id, RR.Mask});
}
}
@@ -1145,7 +1147,7 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
LaneBitmask M;
for (auto P : R.second)
M |= P.second;
- Local.insert(RegisterRef(R.first,M));
+ Local.insert(RegisterRef(R.first, M));
}
if (Trace) {
@@ -1164,6 +1166,6 @@ void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
}
void Liveness::emptify(RefMap &M) {
- for (auto I = M.begin(), E = M.end(); I != E; )
+ for (auto I = M.begin(), E = M.end(); I != E;)
I = I->second.empty() ? M.erase(I) : std::next(I);
}
diff --git a/llvm/lib/CodeGen/RDFRegisters.cpp b/llvm/lib/CodeGen/RDFRegisters.cpp
index 9a1790aac53f5..3e9a11d5397c9 100644
--- a/llvm/lib/CodeGen/RDFRegisters.cpp
+++ b/llvm/lib/CodeGen/RDFRegisters.cpp
@@ -25,7 +25,7 @@ using namespace llvm;
using namespace rdf;
PhysicalRegisterInfo::PhysicalRegisterInfo(const TargetRegisterInfo &tri,
- const MachineFunction &mf)
+ const MachineFunction &mf)
: TRI(tri) {
RegInfos.resize(TRI.getNumRegs());
@@ -57,7 +57,7 @@ PhysicalRegisterInfo::PhysicalRegisterInfo(const TargetRegisterInfo &tri,
UnitInfos[U].Reg = F;
} else {
for (MCRegUnitMaskIterator I(F, &TRI); I.isValid(); ++I) {
- std::pair<uint32_t,LaneBitmask> P = *I;
+ std::pair<uint32_t, LaneBitmask> P = *I;
UnitInfo &UI = UnitInfos[P.first];
UI.Reg = F;
if (P.second.any()) {
@@ -80,7 +80,7 @@ PhysicalRegisterInfo::PhysicalRegisterInfo(const TargetRegisterInfo &tri,
if (Op.isRegMask())
RegMasks.insert(Op.getRegMask());
- MaskInfos.resize(RegMasks.size()+1);
+ MaskInfos.resize(RegMasks.size() + 1);
for (uint32_t M = 1, NM = RegMasks.size(); M <= NM; ++M) {
BitVector PU(TRI.getNumRegUnits());
const uint32_t *MB = RegMasks.get(M);
@@ -111,7 +111,7 @@ std::set<RegisterId> PhysicalRegisterInfo::getAliasSet(RegisterId Reg) const {
// XXX SLOW
const uint32_t *MB = getRegMaskBits(Reg);
for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) {
- if (MB[i/32] & (1u << (i%32)))
+ if (MB[i / 32] & (1u << (i % 32)))
continue;
AS.insert(i);
}
@@ -142,13 +142,13 @@ bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const {
// Reg units are returned in the numerical order.
while (UMA.isValid() && UMB.isValid()) {
// Skip units that are masked off in RA.
- std::pair<RegisterId,LaneBitmask> PA = *UMA;
+ std::pair<RegisterId, LaneBitmask> PA = *UMA;
if (PA.second.any() && (PA.second & RA.Mask).none()) {
++UMA;
continue;
}
// Skip units that are masked off in RB.
- std::pair<RegisterId,LaneBitmask> PB = *UMB;
+ std::pair<RegisterId, LaneBitmask> PB = *UMB;
if (PB.second.any() && (PB.second & RB.Mask).none()) {
++UMB;
continue;
@@ -167,7 +167,7 @@ bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const {
bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const {
assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg));
const uint32_t *MB = getRegMaskBits(RM.Reg);
- bool Preserved = MB[RR.Reg/32] & (1u << (RR.Reg%32));
+ bool Preserved = MB[RR.Reg / 32] & (1u << (RR.Reg % 32));
// If the lane mask information is "full", e.g. when the given lane mask
// is a superset of the lane mask from the register class, check the regmask
// bit directly.
@@ -188,7 +188,7 @@ bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const {
if ((SM & RR.Mask).none())
continue;
unsigned SR = SI.getSubReg();
- if (!(MB[SR/32] & (1u << (SR%32))))
+ if (!(MB[SR / 32] & (1u << (SR % 32))))
continue;
// The subregister SR is preserved.
M &= ~SM;
@@ -205,7 +205,7 @@ bool PhysicalRegisterInfo::aliasMM(RegisterRef RM, RegisterRef RN) const {
const uint32_t *BM = getRegMaskBits(RM.Reg);
const uint32_t *BN = getRegMaskBits(RN.Reg);
- for (unsigned w = 0, nw = NumRegs/32; w != nw; ++w) {
+ for (unsigned w = 0, nw = NumRegs / 32; w != nw; ++w) {
// Intersect the negations of both words. Disregard reg=0,
// i.e. 0th bit in the 0th word.
uint32_t C = ~BM[w] & ~BN[w];
@@ -234,8 +234,8 @@ RegisterRef PhysicalRegisterInfo::mapTo(RegisterRef RR, unsigned R) const {
return RegisterRef(R, TRI.composeSubRegIndexLaneMask(Idx, RR.Mask));
if (unsigned Idx = TRI.getSubRegIndex(RR.Reg, R)) {
const RegInfo &RI = RegInfos[R];
- LaneBitmask RCM = RI.RegClass ? RI.RegClass->LaneMask
- : LaneBitmask::getAll();
+ LaneBitmask RCM =
+ RI.RegClass ? RI.RegClass->LaneMask : LaneBitmask::getAll();
LaneBitmask M = TRI.reverseComposeSubRegIndexLaneMask(Idx, RR.Mask);
return RegisterRef(R, M & RCM);
}
@@ -247,7 +247,7 @@ bool RegisterAggr::hasAliasOf(RegisterRef RR) const {
return Units.anyCommon(PRI.getMaskUnits(RR.Reg));
for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {
- std::pair<uint32_t,LaneBitmask> P = *U;
+ std::pair<uint32_t, LaneBitmask> P = *U;
if (P.second.none() || (P.second & RR.Mask).any())
if (Units.test(P.first))
return true;
@@ -262,7 +262,7 @@ bool RegisterAggr::hasCoverOf(RegisterRef RR) const {
}
for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {
- std::pair<uint32_t,LaneBitmask> P = *U;
+ std::pair<uint32_t, LaneBitmask> P = *U;
if (P.second.none() || (P.second & RR.Mask).any())
if (!Units.test(P.first))
return false;
@@ -277,7 +277,7 @@ RegisterAggr &RegisterAggr::insert(RegisterRef RR) {
}
for (MCRegUnitMaskIterator U(RR.Reg, &PRI.getTRI()); U.isValid(); ++U) {
- std::pair<uint32_t,LaneBitmask> P = *U;
+ std::pair<uint32_t, LaneBitmask> P = *U;
if (P.second.none() || (P.second & RR.Mask).any())
Units.set(P.first);
}
@@ -350,7 +350,7 @@ RegisterRef RegisterAggr::makeRegRef() const {
LaneBitmask M;
for (MCRegUnitMaskIterator I(F, &PRI.getTRI()); I.isValid(); ++I) {
- std::pair<uint32_t,LaneBitmask> P = *I;
+ std::pair<uint32_t, LaneBitmask> P = *I;
if (Units.test(P.first))
M |= P.second.none() ? LaneBitmask::getAll() : P.second;
}
@@ -364,8 +364,7 @@ void RegisterAggr::print(raw_ostream &OS) const {
OS << " }";
}
-RegisterAggr::rr_iterator::rr_iterator(const RegisterAggr &RG,
- bool End)
+RegisterAggr::rr_iterator::rr_iterator(const RegisterAggr &RG, bool End)
: Owner(&RG) {
for (int U = RG.Units.find_first(); U >= 0; U = RG.Units.find_next(U)) {
RegisterRef R = RG.PRI.getRefForUnit(U);
More information about the llvm-commits
mailing list