[PATCH] D152411: [RISCV] Fix crash in lowerVECTOR_INTERLEAVE when VecVT is an LMUL=8 type.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 8 08:47:45 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG167f2fa1b6df: [RISCV] Fix crash in lowerVECTOR_INTERLEAVE when VecVT is an LMUL=8 type. (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152411/new/
https://reviews.llvm.org/D152411
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D152411.529612.patch
Type: text/x-patch
Size: 12276 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230608/82d744c7/attachment.bin>
More information about the llvm-commits
mailing list