[PATCH] D152059: [AVR] Replace shift-to-loop IR pass with common shift code

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 8 06:57:32 PDT 2023


benshi001 added inline comments.


================
Comment at: llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp:263
+
+    if (isLogicRegOpUndef(Op, Lo8)) {
+      MIBLO->getOperand(1).setIsUndef(true);
----------------
Why `and` with zero should be special? Could you please give an example? Or add a test .ll ?


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:1901
+static void insertMultibyteShift(MachineBasicBlock::iterator MBBI,
+                                 MachineBasicBlock *BB, const DebugLoc &dl,
                                  MutableArrayRef<std::pair<Register, int>> Regs,
----------------
It would  be better to be `DL` than `dl`.


================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:2172
+    MutableArrayRef<std::pair<Register, int>> Regs, ISD::NodeType Opc) {
+  const DebugLoc &dl = MI.getDebugLoc();
+  MachineFunction *MF = BB->getParent();
----------------
`DL`


Repository:
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  https://reviews.llvm.org/D152059/new/

https://reviews.llvm.org/D152059



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