[llvm] 099a80f - AMDGPU: Fix errors in test from using non-gfx calling convention
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 8 04:25:19 PDT 2023
Author: Matt Arsenault
Date: 2023-06-08T07:24:52-04:00
New Revision: 099a80f11c10cfc026125fb3324071116a996727
URL: https://github.com/llvm/llvm-project/commit/099a80f11c10cfc026125fb3324071116a996727
DIFF: https://github.com/llvm/llvm-project/commit/099a80f11c10cfc026125fb3324071116a996727.diff
LOG: AMDGPU: Fix errors in test from using non-gfx calling convention
Added:
Modified:
llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll b/llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
index d71a3f9276040..1ca3e8f67eab5 100644
--- a/llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
+++ b/llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll
@@ -8,7 +8,7 @@
; 6 kB of LDS, allows 10 workgroups
@lds = internal addrspace(3) global [384 x <4 x i32>] undef
-define internal void @copy(ptr addrspace(1) %src, i32 %ofs) alwaysinline {
+define internal amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 %ofs) alwaysinline {
%src.gep = getelementptr <4 x i32>, ptr addrspace(1) %src, i32 %ofs
%ld = load <4 x i32>, ptr addrspace(1) %src.gep
%dst.gep = getelementptr <4 x i32>, ptr addrspace(3) @lds, i32 %ofs
@@ -118,37 +118,37 @@ define amdgpu_cs void @test(ptr addrspace(1) %src) "amdgpu-flat-work-group-size"
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: ds_store_b128 v0, v[126:129] offset:496
; CHECK-NEXT: s_endpgm
- call void @copy(ptr addrspace(1) %src, i32 0)
- call void @copy(ptr addrspace(1) %src, i32 1)
- call void @copy(ptr addrspace(1) %src, i32 2)
- call void @copy(ptr addrspace(1) %src, i32 3)
- call void @copy(ptr addrspace(1) %src, i32 4)
- call void @copy(ptr addrspace(1) %src, i32 5)
- call void @copy(ptr addrspace(1) %src, i32 6)
- call void @copy(ptr addrspace(1) %src, i32 7)
- call void @copy(ptr addrspace(1) %src, i32 8)
- call void @copy(ptr addrspace(1) %src, i32 9)
- call void @copy(ptr addrspace(1) %src, i32 10)
- call void @copy(ptr addrspace(1) %src, i32 11)
- call void @copy(ptr addrspace(1) %src, i32 12)
- call void @copy(ptr addrspace(1) %src, i32 13)
- call void @copy(ptr addrspace(1) %src, i32 14)
- call void @copy(ptr addrspace(1) %src, i32 15)
- call void @copy(ptr addrspace(1) %src, i32 16)
- call void @copy(ptr addrspace(1) %src, i32 17)
- call void @copy(ptr addrspace(1) %src, i32 18)
- call void @copy(ptr addrspace(1) %src, i32 19)
- call void @copy(ptr addrspace(1) %src, i32 20)
- call void @copy(ptr addrspace(1) %src, i32 21)
- call void @copy(ptr addrspace(1) %src, i32 22)
- call void @copy(ptr addrspace(1) %src, i32 23)
- call void @copy(ptr addrspace(1) %src, i32 24)
- call void @copy(ptr addrspace(1) %src, i32 25)
- call void @copy(ptr addrspace(1) %src, i32 26)
- call void @copy(ptr addrspace(1) %src, i32 27)
- call void @copy(ptr addrspace(1) %src, i32 28)
- call void @copy(ptr addrspace(1) %src, i32 29)
- call void @copy(ptr addrspace(1) %src, i32 30)
- call void @copy(ptr addrspace(1) %src, i32 31)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 0)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 1)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 2)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 3)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 4)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 5)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 6)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 7)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 8)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 9)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 10)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 11)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 12)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 13)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 14)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 15)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 16)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 17)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 18)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 19)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 20)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 21)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 22)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 23)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 24)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 25)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 26)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 27)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 28)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 29)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 30)
+ call amdgpu_gfx void @copy(ptr addrspace(1) %src, i32 31)
ret void
}
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