[PATCH] D145163: Add support for vectorization of interleaved memory accesses for scalable VF

[Graham Hunter via Phabricator via llvm-commits]

huntergr added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp:449
+  if (isa<ScalableVectorType>(VecTy))
+    return InstructionCost::getInvalid();
   auto *FVTy = cast<FixedVectorType>(VecTy);
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fhahn wrote:
> Could you make sure there's a test case for RISCV that covers this case before landing?
I added that check because both interleaved-accesses.ll and strided-accesses.ll (in llvm/test/Transforms/LoopVectorize/RISCV/) crash on the cast below when vplan tries to get the cost of the interleaving group with a scalable VF. Is that sufficient?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145163/new/

https://reviews.llvm.org/D145163