[PATCH] D14327: IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

Wed Jun 7 06:40:54 PDT 2023

arsenm added inline comments.

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Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt:7523

-# GFX10: v_ldexp_f16_e64 v5, v1, -4.0            ; encoding: [0x05,0x00,0x3b,0xd5,0x01,0xef,0x01,0x00]
+# GFX10: v_ldexp_f16_e64 v5, v1, 0xc400          ; encoding: [0x05,0x00,0x3b,0xd5,0x01,0xff,0x01,0x00,0x00,0xc4,0x00,0x00]
 0x05,0x00,0x3b,0xd5,0x01,0xef,0x01,0x00
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foad wrote:
> What caused this change in the assembler/disassembler behaviour? It looks like it has broken round-tripping, since the "encoding" output is longer than the input.
The exp operand was incorrectly marked as i32 when it's really i16. The inline immediate values are then different

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D14327/new/

https://reviews.llvm.org/D14327