[PATCH] D151894: [AArch64] Neoverse V2 scheduling model

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Harvin has been looking at writing Cortex-A510 scheduling model recently, and noticed that most of the SVE instructions use Pseudos through a lot of the pipeline instead of the real instructions. Like ABS_ZPmZ_UNDEF_B and ADDHA_MPPZ_D_PSEUDO_D. You may find that especially in pre-ra scheduling the instruction do not match the real ones added here, and they need extra regex's to match the pseudos. (The same is likely true of the Neoverse-N2 scheduling model).


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https://reviews.llvm.org/D151894