[PATCH] D150969: [AArch64] Try to convert two XTN and two SMLSL to UZP1, SMLSL and SMLSL2
JinGu Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 7 03:33:51 PDT 2023
jaykang10 updated this revision to Diff 529235.
jaykang10 added a comment.
Following @dmgreen's comment, the code is implemented in dagcombine.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150969/new/
https://reviews.llvm.org/D150969
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/aarch64-smull.ll
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