[llvm] a4bf2be - [Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 6 20:21:06 PDT 2023
Author: Fangrui Song
Date: 2023-06-06T20:21:00-07:00
New Revision: a4bf2be5d2b585bd3d7baa70bd06cdfd6e0da4e0
URL: https://github.com/llvm/llvm-project/commit/a4bf2be5d2b585bd3d7baa70bd06cdfd6e0da4e0
DIFF: https://github.com/llvm/llvm-project/commit/a4bf2be5d2b585bd3d7baa70bd06cdfd6e0da4e0.diff
LOG: [Hexagon,Lanai,LoongArch,Sparc] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC
Added:
Modified:
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
index a9167489562d4..8bf4d0a41298b 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
@@ -364,7 +364,8 @@ uint32_t HexagonMCCodeEmitter::parseBits(size_t Last, MCInst const &MCB,
}
/// Emit the bundle.
-void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
+void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI,
+ SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
MCInst &HMB = const_cast<MCInst &>(MI);
@@ -380,7 +381,7 @@ void HexagonMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) {
MCInst &HMI = const_cast<MCInst &>(*I.getInst());
- EncodeSingleInstruction(HMI, OS, Fixups, STI, parseBits(Last, HMB, HMI));
+ encodeSingleInstruction(HMI, CB, Fixups, STI, parseBits(Last, HMB, HMI));
State.Extended = HexagonMCInstrInfo::isImmext(HMI);
State.Addend += HEXAGON_INSTR_SIZE;
++State.Index;
@@ -394,10 +395,10 @@ static bool RegisterMatches(unsigned Consumer, unsigned Producer,
Consumer);
}
-/// EncodeSingleInstruction - Emit a single
-void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI,
- raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
- const MCSubtargetInfo &STI, uint32_t Parse) const {
+void HexagonMCCodeEmitter::encodeSingleInstruction(
+ const MCInst &MI, SmallVectorImpl<char> &CB,
+ SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI,
+ uint32_t Parse) const {
assert(!HexagonMCInstrInfo::isBundle(MI));
uint64_t Binary;
@@ -442,7 +443,7 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(const MCInst &MI,
Binary |= SubBits0 | (SubBits1 << 16);
}
- support::endian::write<uint32_t>(OS, Binary, support::little);
+ support::endian::write<uint32_t>(CB, Binary, support::little);
++MCNumEmitted;
}
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
index 151964bf818b9..aee95bc3e8f0f 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
@@ -49,11 +49,11 @@ class HexagonMCCodeEmitter : public MCCodeEmitter {
HexagonMCCodeEmitter(MCInstrInfo const &MII, MCContext &MCT)
: MCT(MCT), MCII(MII) {}
- void encodeInstruction(MCInst const &MI, raw_ostream &OS,
+ void encodeInstruction(MCInst const &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const override;
- void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeSingleInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI,
uint32_t Parse) const;
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
index ec573a189a70e..5f9c2a100223e 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
@@ -24,6 +24,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Casting.h"
+#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
@@ -74,7 +75,7 @@ class LanaiMCCodeEmitter : public MCCodeEmitter {
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const;
- void encodeInstruction(const MCInst &Inst, raw_ostream &Ostream,
+ void encodeInstruction(const MCInst &Inst, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const override;
@@ -170,15 +171,14 @@ LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
}
void LanaiMCCodeEmitter::encodeInstruction(
- const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups,
+ const MCInst &Inst, SmallVectorImpl<char> &CB,
+ SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &SubtargetInfo) const {
// Get instruction encoding and emit it
unsigned Value = getBinaryCodeForInstr(Inst, Fixups, SubtargetInfo);
++MCNumEmitted; // Keep track of the number of emitted insns.
- // Emit bytes in big-endian
- for (int i = (4 - 1) * 8; i >= 0; i -= 8)
- Ostream << static_cast<char>((Value >> i) & 0xff);
+ support::endian::write<uint32_t>(CB, Value, support::big);
}
// Encode Lanai Memory Operand
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
index 4587d59087f32..174261906c31b 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp
@@ -39,7 +39,7 @@ class LoongArchMCCodeEmitter : public MCCodeEmitter {
~LoongArchMCCodeEmitter() override {}
- void encodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -274,8 +274,8 @@ LoongArchMCCodeEmitter::getExprOpValue(const MCInst &MI, const MCOperand &MO,
}
void LoongArchMCCodeEmitter::encodeInstruction(
- const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
- const MCSubtargetInfo &STI) const {
+ const MCInst &MI, SmallVectorImpl<char> &CB,
+ SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
// Get byte count of instruction.
unsigned Size = Desc.getSize();
@@ -285,7 +285,7 @@ void LoongArchMCCodeEmitter::encodeInstruction(
llvm_unreachable("Unhandled encodeInstruction length!");
case 4: {
uint32_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
- support::endian::write(OS, Bits, support::little);
+ support::endian::write(CB, Bits, support::little);
break;
}
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
index e69319fb9e264..333e0b443b77a 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
@@ -53,7 +53,7 @@ class SparcMCCodeEmitter : public MCCodeEmitter {
SparcMCCodeEmitter &operator=(const SparcMCCodeEmitter &) = delete;
~SparcMCCodeEmitter() override = default;
- void encodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -87,11 +87,12 @@ class SparcMCCodeEmitter : public MCCodeEmitter {
} // end anonymous namespace
-void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
+void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI,
+ SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI);
- support::endian::write(OS, Bits,
+ support::endian::write(CB, Bits,
Ctx.getAsmInfo()->isLittleEndian() ? support::little
: support::big);
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