[llvm] 8c64923 - [RISCV] Fix UBSan failure on signed integer overflow.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 6 18:27:42 PDT 2023


Author: Craig Topper
Date: 2023-06-06T18:27:33-07:00
New Revision: 8c649231f416551ad2a740cb4698fd9705141971

URL: https://github.com/llvm/llvm-project/commit/8c649231f416551ad2a740cb4698fd9705141971
DIFF: https://github.com/llvm/llvm-project/commit/8c649231f416551ad2a740cb4698fd9705141971.diff

LOG: [RISCV] Fix UBSan failure on signed integer overflow.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 6bd30b274ddcf..27269be559822 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -211,7 +211,7 @@ static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
   // constant pool.
   if (Seq.size() > 3) {
     int64_t LoVal = SignExtend64<32>(Imm);
-    int64_t HiVal = SignExtend64<32>((Imm - LoVal) >> 32);
+    int64_t HiVal = SignExtend64<32>(((uint64_t)Imm - (uint64_t)LoVal) >> 32);
     if (LoVal == HiVal) {
       RISCVMatInt::InstSeq SeqLo =
           RISCVMatInt::generateInstSeq(LoVal, Subtarget.getFeatureBits());

diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 90f953d3bedf4..a756689252a69 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -4404,7 +4404,7 @@ static SDValue lowerConstant(SDValue Op, SelectionDAG &DAG,
   // that if it will avoid a constant pool.
   // It will require an extra temporary register though.
   int64_t LoVal = SignExtend64<32>(Imm);
-  int64_t HiVal = SignExtend64<32>((Imm - LoVal) >> 32);
+  int64_t HiVal = SignExtend64<32>(((uint64_t)Imm - (uint64_t)LoVal) >> 32);
   if (LoVal == HiVal) {
     RISCVMatInt::InstSeq SeqLo =
         RISCVMatInt::generateInstSeq(LoVal, Subtarget.getFeatureBits());


        


More information about the llvm-commits mailing list